Results 191 to 200 of about 1,279,794 (256)

Hyperspectral imaging of microwave metasurfaces with deeply subwavelength resolution. [PDF]

open access: yesNat Commun
Penketh H   +6 more
europepmc   +1 more source
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Gluing silicon with silicone

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 1998
Abstract Problems and solutions concerning the gluing of silicon detectors are discussed. The R & D work for the HERA- B vertex detector system led to gluing studies with epoxy and silicone-based adhesives used on ceramics and carbon fibre. The HERA- B solution using a silicone glue is presented.
Abt, I.   +8 more
openaire   +3 more sources

Silicon/silicon oxide and silicon/silicon nitride multilayers for extreme ultraviolet

Optical Engineering, 1991
Si/SiO2 and Si/Si3N4 multilayers have been fabricated using a locally made reactive diode ri-sputtering system. The layer alternation is obtained by modulating a partial pressure of oxygen or nitrogen near the sample using a silicon target with argon as sputtering gas.
Louis Hennet   +6 more
openaire   +3 more sources

Strained-Silicon on Silicon and Strained-Silicon on Silicon-Germanium on Silicon by Relaxed Buffer Bonding

Journal of The Electrochemical Society, 2006
We report the creation of two novel complementary metal oxide semiconductor CMOS -compatible platforms: strained-silicon onsilicon SSOS and strained-silicon on silicon-germanium on silicon SGOS . SSOS substrate has an epitaxially defined, strained-silicon layer directly on silicon wafer without an intermediate SiGe or oxide layer. SSOS is a homochemical
David M. Isaacson   +5 more
openaire   +2 more sources

Silicon-On-Silicon Packaging

IEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1984
Honeywell's new packaging technique uses silicon as a multichip substrate. Multiple integrated circuit (IC) chips are flip bonded by controlled collapse joining to a silicon substrate. The silicon substratc provides the interconnections between chips and the next level of interface.
W. Nunne   +5 more
openaire   +2 more sources

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