Results 11 to 20 of about 23,654 (156)

Power quality enhancement in asymmetrical cascaded multilevel inverter using modified carrier level shifted pulse width modulation approach

IET Power Electronics, EarlyView., 2022
New modified carrier‐based level shifted pulse width modulation approaches for single‐phase trinary dc source fed cascaded H‐bridge inverters are proposed in this article. In order to suppress the lower order harmonics, the carrier frequency is often tuned higher. However, switching and electromagnetic interference problems have a significant influence
Arun Vijayakumar, Albert Alexander Stonier, Geno Peter, Ashok Kumar Loganathan, Vivekananda Ganji   +4 more
wiley   +1 more source

A new symmetric modular eleven‐level inverter using single and double source unit for low voltage applications with reduced number of switches

IET Power Electronics, EarlyView., 2023
This study introduces a new modular multilevel inverter that can produce five levels of positive voltage using only six power switches and five DC voltage sources. The basic unit is composed of a single‐ and double‐source (SDS) unit. SDS reduces the number of power electronic components, such as the insulated gate bipolar transistors, freewheeling ...
Naser Fakhri, Sara Laali, Mohammad Salay Naderi, Hossein Rahimi, Saeid Gholami Farkoush   +4 more
wiley   +1 more source

A nine‐level T‐type inverter (9L‐TTI) with voltage boost capability

IET Power Electronics, EarlyView., 2023
A new multi‐level inverter topology with boosting feature considering the reduced switch count has been presented, compared and validated. Abstract This paper introduces a 9L T‐type boost inverter (9L‐TTI) based multilevel topology, which generates a nine‐level output voltage in the boost mode.
Zarren Firdous, Saad Mekhilef, Nidhi Mishra, Asif Mustafa, Mehdi Seyedmahmoudian, Alex Stojcevski   +5 more
wiley   +1 more source

Dual source novel nine level inverter (DSN2LI) design with minimum active devices and inherent polarity generation

IET Power Electronics, EarlyView., 2023
This article presents a dual‐source novel nine‐level inverter (DSN2LI) featuring minimal devices. Utilizing eight switches, which include 2 bidirectional switching devices and 2 uneven dc links, the proposed DSN2LI generates nine levels. The DSN2LI employs the utilization of trinary geometric DC links.
Arun Vijayakumar, Albert Alexander Stonier, Geno Peter, Vivekananda Ganji   +3 more
wiley   +1 more source

Triple boost switched capacitor multilevel inverter (TB‐SCMLI) with reduced components and self‐voltage balance

IET Power Electronics, EarlyView., 2023
The proposed TB‐SCMLI is able to provide seven levels of output voltage by balancing the voltage of two capacitors with the given control logic. The various SCMLIs are evaluated to determine the contribution of the suggested TB‐SCMLI topology's merits and downsides.
Md. Reyaz Hussan, Mohammed A. Al‐Hitmi, Marif Daula Siddique, Shirazul Islam, Atif Iqbal   +4 more
wiley   +1 more source

Harmonic elimination of a fifteen‐level inverter with reduced number of switches using genetic algorithm

IET Power Electronics, EarlyView., 2023
This article presents a Fifteen‐level inverter topology that has a lesser number of switches (12) and can accommodate isolated DC sources. The total harmonic elimination (THD) of the proposed topology using genetic algorithm is within the IEEE 519 standards. Further, the fifteen‐level inverter is implemented in Hardware and firing pulses were generated
Yogesh Joshi, Shimi Sudha Letha, Farhad Ilahi Bakhsh, Gopal Lal Jaat, Suyash Tilak   +4 more
wiley   +1 more source

Power Quality Analysis of a Hybrid Microgrid-Based SVM Inverter-Fed Induction Motor Drive with Modulation Index Diversification

Energies, 2022
The effects of varying modulation indices on the current and voltage harmonics of an induction motor (IM) powered by a three-phase space vector pulse-width modulation (SVM) inverter are presented in this research.
Subramanian Vasantharaj, Vairavasundaram Indragandhi, Mohan Bharathidasan, Belqasem Aljafari   +3 more
doaj   +1 more source

Total Harmonic Distortion Measurement of 13-level FCML Inverter for SPWM and THIPWM Method [PDF]

Journal of Electrical and Electronics Engineering, 2022
One of the main problems for flying capacitor multilevel (FCML) inverter is the higher value of total harmonic distortion (THD) with number of capacitors and switching devices.
BHADRA Ananta Bijoy
doaj  

Design and Harmonic Elimination of sinusoidal pulse width modulation (SPWM) Based Five Level Cascaded H-Bridge Multilevel Inverter for Photovoltaic System for Educational Purposes

Indonesian Journal of Teaching in Science, 2023
In this modern era, the electrical power system faces a shortage of fossil fuel-based energy sources. To overcome this problem, people more focus on giving towards renewable energy sources like solar energy, wind energy, and nuclear energy sources.
Bibhu Prasad Ganthia, B. M. Praveen
doaj   +1 more source

Comparison of Pulse Width Modulation Techniques for Diode-Clamped and Cascaded Multilevel Inverters

Engineering, Technology & Applied Science Research, 2023
Multilevel inverter technology has become the most significant method of energy conversion from DC to AC for uninterrupted power supply. The quality of the power supply depends on the appearance of harmonics, which is considered a problem that needs to ...
Kishor Gudipati, Harsha Vardhan Reddy Maramreddy, Srikanth Kolli, Vuyyuru Anantha Lakshmi, Girireddy Sreenivasa Reddy   +4 more
semanticscholar   +1 more source