Results 11 to 20 of about 4,758,611 (164)

Hardware acceleration of number theoretic transform for zk‐SNARK

Engineering Reports, EarlyView., 2023
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao, Dong Ding, Feng Wang, Pengcheng Hua, Ning Wang, Qin Wu, Zhilei Chai   +6 more
wiley   +1 more source

Exploring Garbage Collection with Haswell Hardware Transactional Memory [PDF]

, 2014
Intel’s latest processor microarchitecture, Haswell, adds support for a restricted form of transactional memory to the x86 programming model. We explore how this can be applied to three garbage collection scenarios in Jikes RVM: parallel copying ...
Jones, Richard E., Richard E. Jones, Ritson, Carl G., Carl G. Ritson, Tomoharu Ugawa, Ugawa, Tomoharu   +5 more
core   +1 more source

Intent Arabic text categorisation based on different machine learning and term frequency

IET Networks, EarlyView., 2022
Abstract The complexity of Internet network configurations has made managing networks a complicated undertaking. Intent‐Based Networking (IBN) is a potential solution to this issue. In contrast to conventional networks, where a concrete description of the settings typically conveys a network administrator's goal kept on each device, an administrator's ...
Mohammad Fadhil Mahdi, Mahmoud Shuker Mahmoud   +1 more
wiley   +1 more source

Correctness of an STM Haskell implementation [PDF]

, 2012
A concurrent implementation of software transactional memory in Concurrent Haskell using a call-by-need functional language with processes and futures is given.
Sabel, David, Schmidt-Schauß, Manfred, Manfred Schmidt-Schauß, David Sabel   +3 more
core   +1 more source

Software transactional memory with interactions [PDF]

, 2020
Software Transactional memory (STM) is an emerging abstraction for concurrent programming alternative to lock-based synchronizations. Most STM models admit only isolated transactions, which are not adequate in multithreaded programming where transactions
Miculan, Marino, Peressotti, Marco; id_orcid   +1 more
core   +6 more sources

The velox transactional memory stack [PDF]

, 2010
The transactional memory programming paradigm could become the coordination methodology of choice for actual and future multicore and many-core architectures.
Moreira, Walter Maldonado, Fetzer, Christof, Stenstr\uf6m, Per, Maldonado, Walther, Drepper, Ulrich, Maldonado Moreira, Walther, Marlier, Patrick, Tomić, Saša, Derin Harmanci, Torvald Riegel, Per Stenstrom, Christof Fetzer, Walther Ma Moreira, Yehuda Afek, Kapalka, Michal, Shavit, Nir, Guerraoui, Rachid, Tomi´c, Saˇsa, Cristal Kestelman, Adrián, Patrick Marlier, Pohlack, Martin, Nowack, Martin, Michael Hohmuth, Stephan Diestelhorst, Gramoli, Vincent, Ulrich Drepper, Guy Korland, Dragojevic, Aleksandar, Stenstrom, Per, Drepper, Ulirch, Etienne Riviere, Harmanci, Derin, Hur, Ibrahim, Tomi\ub4c, Saˇsa, Cristal, Adrian, Osman Unsal, Martin Pohlack, Ibrahim Hur, Stenström, Per,, Felber, Pascal, Vincent Gramoli, Diestelhorst, Stephan, Nir Shavit, Pascal Felber, Korland, Guy, Unsal, Osman, Hohmuth, Michael, Adrian Cristal, Michal Kapalka, Rivi`ere, Etienne, Dragojevic, Alexander, Martin Nowack, Fetzer, Christoph, Riviere, Etienne, Aleksandar Dragojevic, Unsal, Osman Sabri, Sasa Tomic, Riegel, Torvald, Rachid Guerraoui, Afek, Yehuda   +59 more
core   +1 more source

Proving Opacity of Transactional Memory with Early Release

Foundations of Computing and Decision Sciences, 2015
Transactional Memory (TM) is an alternative way of synchronizing concurrent accesses to shared memory by adopting the abstraction of transactions in place of low-level mechanisms like locks and barriers.
Siek Konrad, Wojciechowski Paweł T.
doaj   +1 more source

Real-Time Support for Software Transactional Memory [PDF]

, 2009
9 pagesInternational audienceTransactional memory is currently a hot research topic, having attracted the focus of both academic researchers and development groups at companies.
Valduriez, Patrick, Sarni, Toufik, Queudet, Audrey   +2 more
core   +3 more sources

Preferential trading in agriculture: New insights from a structural gravity analysis and machine learning

American Journal of Agricultural Economics, EarlyView.
Abstract Preferential trade agreements (PTAs) contain various non‐tariff provisions, yet identifying their trade effects remains challenging because these commitments are high‐dimensional and strongly correlated within agreements. We estimated a theory‐consistent structural gravity model with domestic flows for 26 agricultural subsectors over 1988–2017
Dongin Kim, Sandro Steinbach
wiley   +1 more source

An Evaluation of Intel's Restricted Transactional Memory for CPAs [PDF]

, 2013
With the release of their latest processor microarchitecture, codenamed Haswell, Intel added new Transactional Synchronization Extensions (TSX) to their processors' instruction set.
Barnes, Frederick R.M., Carl G Ritson, Frederick R M Barnes, Ritson, Carl G.   +3 more
core   +1 more source