Results 211 to 220 of about 126,641 (259)

Software Transactional Memory for GPU Architectures

Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014
Modern GPUs have shown promising results in accelerating computation intensive and numerical workloads with limited dynamic data sharing. However, many real-world applications manifest ample amount of data sharing among concurrently executing threads.
Yunlong Xu, Rui Wang, Nilanjan Goswami, Tao Li, Lan Gao, Depei Qian   +5 more
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Multithreaded software transactional memory and OpenMP

Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture, 2007
Transactional Memory (TM) is a key future technology for emerging many-cores. On the other hand, OpenMP provides a vast established base for writing parallel programs, especially for scientific applications. Combining TM with OpenMP provides a rich, enhanced programming environment and an attractive solution to the many-core software productivity ...
Miloš Milovanović, Roger Ferrer, Vladimir Gajinov, Osman S. Unsal, Adrian Cristal, Eduard Ayguadé, Mateo Valero   +6 more
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Investigating software Transactional Memory on clusters

2008 IEEE International Symposium on Parallel and Distributed Processing, 2008
Traditional parallel programming models achieve synchronization with error-prone and complex-to-debug constructs such as locks and barriers. Transactional Memory (TM) is a promising new parallel programming abstraction that replaces conventional locks with critical sections expressed as transactions. Most TM research has focused on single address space
Christos Kotselidis, Mohammad Ansari, Kimberly Jarvis, Mikel Lujan, Chris Kirkham, Ian Watson   +5 more
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Architectural Support for Software Transactional Memory

2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 2006
Transactional memory provides a concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. Researchers have proposed several different implementations of transactional memory, broadly classified into software transactional memory (STM) and hardware transactional memory (HTM).
Bratin Saha, Ali-reza Adl-Tabatabai, Quinn Jacobson   +2 more
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D2STM: Dependable Distributed Software Transactional Memory

2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009
At current date the problem of how to build distributed and replicated Software Transactional Memory (STM) to enhance both dependability and performance is still largely unexplored. This paper fills this gap by presenting D2STM, a replicated STM whose consistency is ensured in a transparent manner, even in the presence of failures.
Maria Couceiro, Paolo Romano, Nuno Carvalho, Luís Rodrigues   +3 more
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Practical Parallel Nesting for Software Transactional Memory

2013
Transactional Memory TM provides a strong abstraction to tackle the challenge of synchronizing concurrent tasks that access shared state. Yet, most TMs do not allow a single transaction to contain parallel code. We propose an efficient parallel nesting algorithm to explore existing latent parallelism within a transaction.
Diegues N., Cachopo J.
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Towards distributed software transactional memory systems

Proceedings of the 2nd Workshop on Large-Scale Distributed Systems and Middleware, 2008
The recent architectural trend that has lead to the widespread adoption of multi-core CPUs has fostered a remarkable research interest in Software Transactional Memory (STM). As STMs are starting to face the high availability and scalability requirements of real-world production environments, it is natural to foresee the need for replication solutions ...
Paolo Romano, Nuno Carvalho, Luís Rodrigues   +2 more
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Enable Concurrent Byzantine Fault Tolerance Computing with Software Transactional Memory

International Conference on Advanced Software Engineering and Its Applications, 2015
Byzantine fault tolerance typically is achieved via state-machine replication, which requires the execution of all requests at the server replicas sequentially in a total order. This could severely limit the system throughput.
Wenbing Zhao, Honglei Zhang, Xiong Luo, Yueqin Zhu   +3 more
semanticscholar   +1 more source

No Cap, This Memory Slaps: Breaking Through the Memory Wall of Transactional Database Systems with Processing-in-Memory

Proceedings of the VLDB Endowment
Memory channel bandwidth imposes an upper bound on the performance of online transaction processing (OLTP) on in-memory database management systems (DBMS).
Hyoungjoo Kim, Yiwei Zhao, Andrew Pavlo, Phillip B. Gibbons   +3 more
semanticscholar   +1 more source

Software Transactional Memory Friendly Slot Schedulers

2014
In this paper, we discuss the design space of highly concurrent linearizable data structures for slot scheduling. We observe that it is not possible to have high fairness across threads, and maximize throughput of the entire system simultaneously. Lock free algorithms are very fast, yet very unfair, and wait free algorithms follow the reverse trend. We
Pooja Aggarwal, Smruti R. Sarangi
openaire   +1 more source