Results 61 to 70 of about 126,641 (259)
Maintaining consistency in distributed systems [PDF]
In systems designed as assemblies of independently developed components, concurrent access to data or data structures normally arises within individual programs, and is controlled using mutual exclusion constructs, such as semaphores and monitors.
Birman, Kenneth P.
core +3 more sources
Efficient nonblocking software transactional memory
Foundational transactional memory research grew out of research into nonblocking concurrent data structures, which aim to overcome the many well-known software engineering, performance, and robustness problems associated with lock-based implementations.
Virendra J. Marathe, Mark Moir
openaire +2 more sources
Software Transactional Memory on Relaxed Memory Models [PDF]
Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptions are often violated in realistic settings, as STM implementations run on relaxed memory models, with the atomicity of operations as provided by the hardware.
Rachid Guerraoui +2 more
openaire +1 more source
Reducing Memory Ordering Overheads in Software Transactional Memory [PDF]
Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total Store Ordering (TSO). To execute these algorithms correctly on processors with relaxed memory models, explicit fence instructions may be required on every transactional access ...
Michael F. Spear +3 more
openaire +1 more source
An AI‐driven CNN–LSTM forecasting framework is integrated with HOMER Pro to optimally design a grid‐connected PV–wind–BESS microgrid for a rural school in Bangladesh, achieving 91.7% renewable penetration, low energy cost (0.0397 USD/kWh), and an 81.5% reduction in CO2 emissions. ABSTRACT Hybrid renewable microgrid planning in HOMER Pro often relies on
Robiul Khan +5 more
wiley +1 more source
Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture [PDF]
Hardware vendors make an important effort creating low-power CPUs that keep battery duration and durability above acceptable levels. In order to achieve this goal and provide good performance-energy for a wide variety of applications, ARM designed the ...
Asenjo-Plaza, Rafael +5 more
core
TMbarrier: speculative barriers using hardware transactional memory [PDF]
Barrier is a very common synchronization method used in parallel programming. Barriers are used typically to enforce a partial thread execution order, since there may be dependences between code sections before and after the barrier.
Gutierrez-Carrasco, Eladio Damian +2 more
core +1 more source
A Deep Learning Framework for Forecasting Medium‐Term Covariance in Multiasset Portfolios
ABSTRACT Forecasting the covariance matrix of asset returns is central to portfolio construction, risk management, and asset pricing. However, most existing models struggle at medium‐term horizons, several weeks to months, where shifting market regimes and slower dynamics prevail.
Pedro Reis, Ana Paula Serra, João Gama
wiley +1 more source
Towards a Software Transactional Memory for heterogeneous CPU-GPU processors [PDF]
The heterogeneous Accelerated Processing Units (APUs) integrate a multi-core CPU and a GPU within the same chip. Modern APUs provide the programmer with platform atomics, used to communicate the CPU cores with the GPU using simple atomic datatypes ...
Asenjo-Plaza, Rafael +3 more
core
Mixing Hardware and Software Reversibility for Speculative Parallel Discrete Event Simulation [PDF]
Speculative parallel discrete event simulation requires a support for reversing processed events, also called state recovery, when causal inconsistencies are revealed.
Cingolani, Davide +3 more
core +1 more source

