Results 161 to 170 of about 22,630 (210)
Implementing a participant-driven water management initiative to support Maryland hospitals. [PDF]
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Digest of Papers. COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference, 1988
A description is given of the port of SunOS, a derivative of the Unix operating system, to the scalable processor architecture (SPARC) RISC (reduced-instruction-set-computer) CPU. SPARC makes tradeoffs between hardware and software complexity. Operations implemented by microcode on CISC (complex-instruction-set computer) CPUs are supported by low-level
Steve R. Kleiman, Dock Williams
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A description is given of the port of SunOS, a derivative of the Unix operating system, to the scalable processor architecture (SPARC) RISC (reduced-instruction-set-computer) CPU. SPARC makes tradeoffs between hardware and software complexity. Operations implemented by microcode on CISC (complex-instruction-set computer) CPUs are supported by low-level
Steve R. Kleiman, Dock Williams
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IEEE Micro, 1990
A joint development project that implemented Sun Microsystems' scalable processor architecture (Sparc) with Bipolar Integrated Technology's bipolar emitter-coupled logic (ECL) is described. The authors review both ECL technology and the features of BIT's ECL technique and discuss how board and cache considerations influenced the chip designs.
Emil W. Brown +5 more
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A joint development project that implemented Sun Microsystems' scalable processor architecture (Sparc) with Bipolar Integrated Technology's bipolar emitter-coupled logic (ECL) is described. The authors review both ECL technology and the features of BIT's ECL technique and discuss how board and cache considerations influenced the chip designs.
Emil W. Brown +5 more
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Collection Management, 2001
The new ship SPARC (Scholarly Publishing and Academic Resources Coalition) was formally launched in 1998 as a response to the realization within the research library community that the lack of competition in the marketplace for scientific journals could eventually translate into the collapse of scientific communications.
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The new ship SPARC (Scholarly Publishing and Academic Resources Coalition) was formally launched in 1998 as a response to the realization within the research library community that the lack of competition in the marketplace for scientific journals could eventually translate into the collapse of scientific communications.
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Atlas of the Urologic Clinics, 2004
The SPARC Sling System David R. Staskin, MD*, Renuka Tyagi, MDc,e Section of Voiding Dysfunction, New York Presbyterian Hospital, 525 East 68th Street, F-9W, New York, NY 10021, USA Section of Female Urology and Urodynamics, New York Presbyterian Hospital, 525 East 68th Street, F-9W, New York, NY 10021, USA Department of Urology, Weill Medical College,
David R. Staskin, Renuka Tyagi
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The SPARC Sling System David R. Staskin, MD*, Renuka Tyagi, MDc,e Section of Voiding Dysfunction, New York Presbyterian Hospital, 525 East 68th Street, F-9W, New York, NY 10021, USA Section of Female Urology and Urodynamics, New York Presbyterian Hospital, 525 East 68th Street, F-9W, New York, NY 10021, USA Department of Urology, Weill Medical College,
David R. Staskin, Renuka Tyagi
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1996
This paper presents a multithreaded processor, the MSparc. MSparc supports up to four contexts on chip and employs block multithreading. The processor is compatible to standard Sparc processors making multithreading completely transparent to application programs.
Alfred Mikschl, Werner Damm
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This paper presents a multithreaded processor, the MSparc. MSparc supports up to four contexts on chip and employs block multithreading. The processor is compatible to standard Sparc processors making multithreading completely transparent to application programs.
Alfred Mikschl, Werner Damm
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The Scalable Processor Architecture (SPARC)
Digest of Papers. COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference, 1988An introduction is given to the SPARC architecture and its more interesting features. The discussion covers the registers (both window and floating-point), and instructions, including formats, load/store, integer computation, control transfer, floating-point computation, and coprocessor.
Robert B. Garner +11 more
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