Results 211 to 220 of about 10,751 (237)

Ultra low power processor using perpendicular-STT-MRAM/SRAM based hybrid cache toward next generation normally-off computers

Journal of Applied Physics, 2012
Kumiko Nomura, Hiroaki Yoda, Shinobu Fujita   +2 more
exaly  

A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization

IEEE Journal of Solid-State Circuits, 2017
Taejoong Song, Hoonki Kim, Sanghoon Baek   +2 more
exaly  

An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI

, 2019
Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi‐Hui Kong, Tony Tae-Hyoung Kim   +3 more
openalex   +1 more source

Design of SRAM Based Interface Module with DMA in Inductive-Coupling 3D Stacked IoT Chips

2022
exaly  

Random fault assessment system for SEU hardened SRAM chip in the aviation level

, 2017
Xue Qiannan, Hao Lü, Ziyuan Wang, Peng Wang   +3 more
openalex   +1 more source

Scenario-aware data placement and memory area allocation for multi-processor system-on-chips with reconfigurable 3D-stacked SRAMs

, 2014
Meng‐Ling Tsai, Yi-Jung Chen, Yi‐Ting Chen, Ru-Hua Chang   +3 more
openalex   +1 more source

A 15Kb 1.5 ns Access On-chip Tag SRAM

Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications, 2005
P.F. Lu, S.P. Kowalcyzk, A.P. Pelella, W.V. Huott, U. Bakhru, J. Rawlins, P. Patel, Y.H. Chan, K.A. Jenkins   +8 more
openaire   +1 more source

Towards SRAM leakage power minimization by aggressive standby voltage scaling — Experiments on 40nm test chips

2017
Tobias Gemmeke
exaly  

Concise Modeling of Transistor Variations in an LSI Chip and Its Application to SRAM Cell Sensitivity Analysis

, 2008
Masanao Aoki, S. Ohkawa, H. Masuda
openalex   +1 more source

Junctionless 6T SRAM cell

Electronics Letters, 2010
A Kranti, I Ferain, Nima Dehdashti Akhavan   +2 more
exaly