Results 161 to 170 of about 108,706 (192)

Layout Based Full Chip Thermal Simulations of Stacked 3D Integrated Circuits

Electronic and Photonic Packaging, Electrical Systems and Photonic Design, and Nanotechnology, 2003
This paper presents full-chip scale detailed thermal simulations of three-dimensional (3D) integrated circuit (IC) stacks. The inter-layer dielectric (ILD) and inter-metal dielectric (IMD) materials inside 3D IC stacks may cause extensive localized heating. The influence of multiple layers of dielectrics on heat trapping inside the 3D stack is analyzed.
Ashok Raman, Marek Turowski, Monte Mar
openaire   +1 more source

Thermal Layout Optimization of Stacked Chip Based on Ant Colony Algorithm

Advanced Materials Research, 2012
In this paper, an ant colony algorithm based on mutual information similarity is proposed to solve the stacked chips on the thermal layout optimization. In order to express the mutual information entropy between the optimal path and walking path, a new similarity impact factor is added in the algorithm operators of ant colony algorithm which increases ...
Jiang Guo Jiang, Qian Su, Ling Feng Shi, Wen Dan Xu   +3 more
openaire   +1 more source

Thermal layout optimization for 3D stacked multichip modules

Microelectronics Journal, 2023
Yanning Chen, Dongyan Zhao, Fang Liu, Jie Gao, Hui Zhu   +4 more
openaire   +1 more source

3D Perception Framework for Stacked Container Layout in the Physical Internet

2018
The Physical Internet concept was developed to address the current unsustainability problem of logistic systems. The key elements are the encapsulation and the handling of world-standard smart green modular containers (π-containers) throughout an open global logistic infrastructure.
Dong-Seong Kim, Hoa Tran-Dang
openaire   +1 more source

An Analytical GPU-Enabled Framework for the Stacked 3D IC Layouts

Journal of Circuits, Systems and Computers
Three-dimensional integrated circuits (3D ICs) have recently garnered significant attention as a potential solution to the challenges posed by interconnect scaling in 2D ICs. However, the inclusion of an extra dimension and the introduction of through-silicon vias (TSVs) for interlayer connections have resulted in a significantly more complex compared
Xin Cheng, Jinjia Zhou, Zhiqiang Zhang, Wenxin Yu   +3 more
openaire   +1 more source

Integrative oncology: Addressing the global challenges of cancer prevention and treatment

Ca-A Cancer Journal for Clinicians, 2022
Jun J Mao,, Msce, Lorenzo Cohen, Karen M Mustian   +2 more
exaly  

Diversification of Stack Layout in Binary Programs Using Dynamic Binary Translation

2012
Despite protracted efforts by researchers and practitioners, security vulnerabilities remain in modern software. Artificial diversity is an effective defense against many types of attack, and one form, address-space randomization, has been widely applied.
openaire   +1 more source

Topological Stack-Queue Mixed Layouts of Graphs

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2020
openaire   +1 more source

Smokestack: Thwarting DOP Attacks with Runtime Stack Layout Randomization

2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 2019
Misiker Tadesse Aga, Todd Austin
openaire   +1 more source

Obesity and adverse breast cancer risk and outcome: Mechanistic insights and strategies for intervention

Ca-A Cancer Journal for Clinicians, 2017
Cynthia Morata-Tarifa, Joyce M Slingerland   +1 more
exaly