Results 181 to 190 of about 2,804 (226)
An Introduction to Symbolic Trajectory Evaluation
, 2006 The rapid growth in hardware complexity has lead to a need for formal verification of hardware designs to prevent bugs from entering the final silicon. Model-checking [3] is by far the most popular technique for automatically verifying properties of designs.
Koen Claessen, Jan-Willem Roorda
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Formal Verification Of Content Addressable Memories Using Symbolic Trajectory Evaluation
Proceedings of the 34th Design Automation Conference, 1997 In this paper we report on new techniques for verifying contentaddressable memories (CAMs), and demonstrate that these techniqueswork well for large industrial designs. It was shown in [Formal verification of PowerPC(TM) arrays using symbolic trajectory evaluation], that theformal verification technique of symbolic trajectory evaluation (STE)could be ...
Manish Pandey +3 more
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Formal verification of memory arrays using symbolic trajectory evaluation
Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. NO.97TB100159), 2002 Verification of memory arrays is an important part of processor verification. Memory arrays include circuits such as on-chip caches, cache tags, register files, and branch prediction buffers having memory cores embedded within complex logic. These circuits are typically custom designed at the transistor-level to optimize area and performance.
M. Pandey, R.E. Bryant
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Symbolic trajectory evaluation for word-level verification: theory and implementation
Formal Methods in System Design, 2017 zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Supratik Chakraborty +6 more
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Generalized Symbolic Trajectory Evaluation — Abstraction in Action
, 2002 Generalized STE (Symbolic Trajectory Evaluation) [21, 22, 23] is a very significant extension of STE [11, 20] that truly combines the efficiency, capacity and ease of use of STE with the ability of classic symbolic model checking for verifying a much richer set of properties [9]. GSTE provides a unified model checking framework that gives one the power
Jin Yang, Carl-Johan H. Seger
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Exploring structural symmetry automatically in symbolic trajectory evaluation
Formal Methods in System Design, 2011 zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Li, Yongjian +3 more
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Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation
Proceedings of the 45th annual Design Automation Conference, 2008 In this paper, we present a suite of optimizations targeting automatic abstraction refinement for generalized symbolic trajectory evaluation (GSTE). We optimize both model refinement and spec refinement supported by AutoGSTE: a counterexample-guided refinement loop for GSTE.
Yan Chen, Fei Xie, Jin Yang
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, 2007 Bounded Model Checking (BMC) based on SAT is a complementary technique to BDD-based Symbolic Model Checking, and it is useful for finding counterexamples of minimum length. However, for model checking of large real world systems, BMC is still limited by the state explosion problem, thus abstraction is essential.
Shujun Deng, Weimin Wu, Jinian Bian
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Completeness Refinement in Abstract Symbolic Trajectory Evaluation
, 2004 In this paper we study the relation between the lack of completeness in abstract symbolic trajectory evaluation and the structure of the counterexamples that can be derived in case of property failure. We characterize the presence of false negatives as a loss of completeness of the underlying abstraction.
Mila Dalla Preda
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Parameterized Hardware Verification Through a Term-Level Generalized Symbolic Trajectory Evaluation
, 2019 This paper proposes a term-level generalized symbolic trajectory evaluation (GSTE) to tackle parameterized hardware verification. We develop a theorem-proving technique for parameterized GSTE verification. In our technique, a constraint is associated with a node in GSTE graphs to specify reachable states.
Yongjian Li, Bow-yaw Wang
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