Results 51 to 60 of about 13,010 (210)

A Language and Toolset for the Synthesis and Efficient Simulation of Clock-Cycle-True Signal-Processing Algorithms [PDF]

, 2005
Optimal simulation speed and synthesizability are contradictory requirements for a hardware description language. This paper presents a language and toolset that enables both synthesis and fast simulation of fixed-point signal processing algorithms at ...
Gerez, Sabih H., Hofstra, Klaas L., Kampen, David van   +2 more
core   +1 more source

System Reliability Evaluation Using Concurrent Multi-Level Simulation of Structural Faults [PDF]

, 2010
This paper provides a methodology that leverages state-of-the-art techniques for efficient fault simulation of structural faults together with transaction level modeling.
Baranowski, R., Di Carlo, Stefano, Hatami, N., Imhof, M.E., Kochte, M.A., Prinetto, Paolo Ernesto, Wunderlich, H.J., Zoellin, C.G.   +7 more
core   +2 more sources

Investigation on Artificial Intelligence Hardware Architecture Design Based on Logic‐in‐Memory Ferroelectric Fin Field‐Effect Transistor at Sub‐3nm Technology Nodes

Advanced Intelligent Systems, Volume 7, Issue 2, February 2025.
This article examines Logic‐in‐Memory (LiM) technology employing Ferroelectric Fin Field‐Effect Transistor for sub‐3 nm nodes, focusing on system‐level implications. LiM circuit performance, including full adder, ternary content‐addressable memory, and flip‐flop, is evaluated using a Verilog‐A model of ferroelectric capacitor.
Changho Ra, Huijun Kim, Juhwan Park, Gwanoh Youn, Uyong Lee, Junsu Heo, Chester Sungchung Park, Jongwook Jeon   +7 more
wiley   +1 more source

The case for static range nitrogen management in Idaho sugarbeet production

Soil Science Society of America Journal, Volume 89, Issue 1, January/February 2025.
Abstract Nitrogen (N) management is important in sugarbeet production because it affects yield and quality. As Idaho sugarbeet yields continued to increase over the preceding decades, crop response data suggested that the established and utilized yield goal N management (YGNM) method for determining N requirements was leading to the overapplication of ...
David D. Tarkalson, Davey Olsen, David L. Bjorneberg, Christopher W. Rogers   +3 more
wiley   +1 more source

Advanced design and characterization methodologies for memory-aware CMOS power-amplifier implementation [PDF]

Advances in Radio Science, 2017
This paper reports on an effective root-cause analysis method of memory effects in power amplifiers, as well as introduces compensation techniques on a circuit design level.
M. Schleyer, D. Maurath, H. Klar, F. Gerfers   +3 more
doaj   +1 more source

CompDSE: A Methodology for Design Space Exploration of Computing Subsystems Within Complex Cyber‐Physical Systems

IET Cyber-Physical Systems: Theory &Applications, Volume 10, Issue 1, January/December 2025.
This paper introduces ‘CompDSE’, a methodology designed to efficiently explore design options for complex distributed cyber‐physical systems (dCPS), with a focus on computing subsystems. By leveraging models automatically generated from runtime data, CompDSE enables rapid evaluation of design choices, supporting performance improvements for next ...
Faezeh Sadat Saadatmand, Todor Stefanov, Ignacio González Alonso, Andy D. Pimentel, Benny Akesson   +4 more
wiley   +1 more source

Simulation von CNFET basierten Digitalschaltungen [PDF]

Advances in Radio Science, 2006
Einwandige Kohlenstoff Nanoröhrchen können sowohl halbleitende als auch metallische Eigenschaften aufweisen, je nachdem wie die Röhrchenachse im Vergleich zur Anordnung der Kohlenstoffatome verläuft.
O. Soffke, P. Zipf, M. Velten, M. Glesner   +3 more
doaj  

A performance-centric ML-based multi-application mapping technique for regular Network-on-Chip

Memories - Materials, Devices, Circuits and Systems, 2023
This research article discusses the challenges faced by the Network-on-Chip (NoC) architecture due to increased integration density and proposes a novel fault-tolerant multi-application mapping approach called ”FANC.” The approach is based on Machine ...
Jitesh Choudhary, Chitrapu Sai Sudarsan, Soumya J.   +2 more
doaj   +1 more source

Plug & Test at System Level via Testable TLM Primitives [PDF]

, 2008
With the evolution of Electronic System Level (ESL) design methodologies, we are experiencing an extensive use of Transaction-Level Modeling (TLM). TLM is a high-level approach to modeling digital systems where details of the communication among modules ...
Alemzadeh, H., Di Carlo, Stefano, Navabi, Z., Prinetto, Paolo Ernesto, Refan, F.   +4 more
core   +1 more source

Punxa: A Python‐Based RISC‐V System Simulator for Education

Electronics Letters, Volume 61, Issue 1, January/December 2025.
This work introduces an interactive co‐simulation framework that helps students understand computer architecture by bridging hardware and software analysis. Prioritizing detailed analysis over performance, it provides an integrated environment for iterative design, performance evaluation, and debugging.
David Castells‐Rufas, David Novo, Xavier Martorell   +2 more
wiley   +1 more source