Results 81 to 90 of about 13,010 (210)
FPGA-based accelerators have recently evolved as strong competitors to the traditional GPU-based accelerators in modern high-performance computing systems. They offer both high computational capabilities and considerably lower energy consumption.
Fahad Bin Muslim +3 more
doaj +1 more source
iMASKO: A Genetic Algorithm Based Optimization Framework for Wireless Sensor Networks
In this paper we present the design and implementation of a generic GA-based optimization framework iMASKO (iNL@MATLAB Genetic Algorithm-based Sensor NetworK Optimizer) to optimize the performance metrics of wireless sensor networks.
Nanhao Zhu, Ian O'Connor
doaj +1 more source
Modelling Smart Card Security Protocols in SystemC TLM
Smart cards are an example of advanced chip technology. They allow information transfer between the card holder and the system over secure networks, but they contain sensitive data related to both the card holder and the system, that has to be kept ...
Bushager, Aisha, Zwolinski, Mark
core +1 more source
Advanced Datapath Synthesis using Graph Isomorphism
This paper presents an advanced DAG-based algorithm for datapath synthesis that targets area minimization using logic-level resource sharing. The problem of identifying common specification logic is formulated using unweighted graph isomorphism problem ...
Choudhury, Mihir +3 more
core +1 more source
Con el incremento en complejidad y miniaturización de los sistemas computacionales actuales, su diseño se ha vuelto cada vez más difícil y lento. Para ello se necesitan modelos óptimos, y desarrollados tempranamente para probar los componentes.
Lucky Lochi Yu Lo
doaj +1 more source
SystemC-A modeling of an automotive seating vibration isolation system [PDF]
A modeling methodology for mixed physical domains system in a new modelling Language is presented. The system is automotive seating vibration isolation system with electronic control.
Al-Junaid, Hessa +2 more
core
We propose an efficient IP-block-based design environment for high-throughput VLSI systems. The flow generates SystemC register-transfer-level (RTL) architecture, starting from a Matlab functional model described as a netlist of functional IP.
Urard Pascal +3 more
doaj +1 more source
Fast Power and Performance Evaluation of FPGA-Based Wireless Communication Systems
In this paper, a new and efficient methodology is proposed to quickly and precisely evaluate the power consumption and performance of wireless communication base-band systems implemented in field-programmable gate arrays (FPGAs).
Jordane Lorandel +2 more
doaj +1 more source
Design and DSP Implementation of Fixed-Point Systems
This article is an introduction to the FRIDGE design environment which supports the design and DSP implementation of fixed-point digital signal processing systems.
Coors Martin +3 more
doaj +1 more source
The TASTE Toolset: turning human designed heterogeneous systems into computer built homogeneous software. [PDF]
The TASTE tool-set results from spin-off studies of the ASSERT project, which started in 2004 with the objective to propose innovative and pragmatic solutions to develop real-time software. One of the primary targets was satellite flight software, but it
Conquet, Eric +4 more
core

