Results 81 to 90 of about 3,147,688 (366)
A kinematically Bifurcated Metamaterial for Integrated Logic Operation and Computing
Advanced Science, EarlyView.A family of 2n‐side kinematic polygonal modules with n decoupled inputs and 2n extreme configurations via kinematic bifurcation is proposed. It allows integrating seven basic logic gates on a quadrilateral module. Moreover, a minimized Parallel Computing Sum of Products function is developed, enabling all 2‐bit arithmetic (including division ...
Kaili Xi +6 more
wiley +1 more source
Omphale: Streamlining the Communication for Jobs in a Multi Processor System on Chip [PDF]
, 2007 Our Multi Processor System on Chip (MPSoC) template provides processing tiles that are connected via a network on chip. A processing tile contains a processing unit and a Scratch Pad Memory (SPM).
Bekooij, M.J.G. +3 more
core +2 more sources
Advanced Science, EarlyView.In this paper, a novel floating gate transistor (BP/POx/WSe2) is developed, which enables rich synaptic functionality under optoelectronic conditions and can mimic human visual memory. By introducing a two‐path convolutional neural network that synergistically fuses optical and electronic inputs, it can achieve efficient feature extraction and weight ...
Yuxuan Zeng +13 more
wiley +1 more source
How to Test Triboelectric Nanogenerators: Key Factors for Standardized Performance Evaluation
Advanced Energy Materials, EarlyView.This paper is a guide on how to test triboelectric nanogenerators (TENGs) so that results can be reliably compared across different laboratories. It explores the many factors (fabrication, mechanical, electrical, and environmental) that can affect TENG testing results and provides recommendations for best practice in testing and performance evaluation.
Daniel M. Mulvihill +10 more
wiley +1 more source
DBEFT: A Dependency-Ratio Bundling Earliest Finish Time Algorithm for Heterogeneous Computing
IEEE Access, 2019 Performance effective task scheduling algorithms are essential for taking advantage of the heterogeneous multi-processor in heterogeneous computing environments.
Tao Li +6 more
doaj +1 more source
IEEE Access, 2020 The Dynamic Partial Reconfiguration function of reconfigurable devices permits tasks to be performed simultaneously on a single device. Nevertheless, task placement and resource management problems emerge with the parallelism of reconfigurable devices ...
Tingyu Zhou +4 more
doaj +1 more source
Hybrid parallel programming with tasks
, 2023 This technical report is an introduction to using a hybrid parallel programming model that combines MPI with OmpSs or OpenMP dependent tasks. This model allows both computation and communication to be expressed using a coarse-grained dataflow approach, which helps to remove most of the unnecessary ordering constraints and intranode synchronisation ...
J. Mark Bull, Jiehong Yu
openaire +1 more source
THE INTEGRATION OF TASK AND DATA PARALLEL SKELETONS [PDF]
Parallel Processing Letters, 2002 We describe a skeletal parallel programming library which integrates task and data parallel constructs within an API for C++. Traditional skeletal requirements for higher orderness and polymorphism are achieved through exploitation of operator overloading and templates, while the underlying parallelism is provided by MPI.
Kuchen, H. (Herbert), Cole, M. (Murray)
openaire +3 more sources
Divided we stand: Parallel distributed stack memory management [PDF]
, 1994 We present an overview of the stack-based memory management techniques that we used in our non-deterministic and-parallel Prolog systems: &-Prolog and DASWAM.
Hermenegildo, Manuel V., Kish, Shen
core +1 more source
Extending the Nested Parallel Model to the Nested Dataflow Model with Provably Efficient Schedulers
, 2016 The nested parallel (a.k.a. fork-join) model is widely used for writing parallel programs. However, the two composition constructs, i.e. "$\parallel$" (parallel) and "$;$" (serial), are insufficient in expressing "partial dependencies" or "partial ...
Dinh, David +2 more
core +1 more source