High-rate self-synchronizing codes [PDF]
Self-synchronization under the presence of additive noise can be achieved by allocating a certain number of bits of each codeword as markers for synchronization.
Fujiwara, Yuichiro, Tonchev, Vladimir D.
core +1 more source
The number of repeated blocks in balanced ternary designs with block size three II
The following statement is proved: a balanced ternary design on \(v\) elements with block size three, index two, and each element repeated in precisely two blocks, and having exactly \(k\) pairs of repeated blocks exists if and only if \(v\equiv 0,2\pmod 3\), \(v\geq 5\), \(0\leq k\leq v(v- 5)/6\), and \(k\neq v(v-5)/6-1\).
Billington, Elizabeth J., Hoffman, D. G.
openaire +3 more sources
Evaluation of Some Algebraic Structures in Balanced Incomplete Block Design
Balanced incomplete block design is an incomplete block design in which any two varieties appear together an equal number of times. In algebra, the existence of block design is closely related to balanced incomplete block design.
U. Akra +3 more
semanticscholar +1 more source
Sparse multi‐trait genomic prediction under balanced incomplete block design
Sparse testing is essential to increase the efficiency of the genomic selection methodology, as the same efficiency (in this case prediction power) can be obtained while using less genotypes evaluated in the fields.
O. Montesinos-López +4 more
semanticscholar +1 more source
A family of balanced ternary designs with block size four [PDF]
This paper shows the existence of an infinite family of cyclic balanced ternary designs where the block size is 4, the index 2 and each block contains precisely one repeated element.
openaire +2 more sources
CONSTRUCTION OF A NEW SERIES OF BALANCED INCOMPLETE BLOCK DESIGN
Incomplete Block Designs were introduced by Yates (1936) with a restriction on the block size that all treatments are not present in the blocks k < v, which are eliminating heterogeneity to a greater extent when the number of treatments is large. Several
Shekar Goud T +2 more
semanticscholar +1 more source
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions [PDF]
In the past decade, Convolutional Neural Networks (CNNs) have demonstrated state-of-the-art performance in various Artificial Intelligence tasks. To accelerate the experimentation and development of CNNs, several software frameworks have been released ...
Bouganis, Christos-Savvas +2 more
core +2 more sources
Unbalanced load flow with hybrid wavelet transform and support vector machine based Error-Correcting Output Codes for power quality disturbances classification including wind energy [PDF]
Purpose. The most common methods to designa multiclass classification consist to determine a set of binary classifiers and to combine them. In this paper support vector machine with Error-Correcting Output Codes (ECOC-SVM) classifier is proposed to ...
Bouktir, Tarek +2 more
core +3 more sources
Design and Application of Memristive Balanced Ternary Univariate Logic Circuit
This paper proposes a unique memristor-based design scheme for a balanced ternary digital logic circuit. First, a design method of a single-variable logic function circuit is proposed.
Xiaoyuan Wang +4 more
semanticscholar +1 more source
A versatile Montgomery multiplier architecture with characteristic three support [PDF]
We present a novel unified core design which is extended to realize Montgomery multiplication in the fields GF(2n), GF(3m), and GF(p). Our unified design supports RSA and elliptic curve schemes, as well as the identity-based encryption which requires a ...
Ozturk, Erdinc +4 more
core +2 more sources

