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Pole-restraining control for npc three-level inverter
2012 IEEE International Energy Conference and Exhibition (ENERGYCON), 2012State-of-the-art control approaches often neglect the time-variant characteristics of power-electronic systems in favour of a time-averaged approach. In consequence, the resulting system is partly instable, thus, not optimally controlled. The pole-restraining control (PRC) removes the inherent instability, giving considerably improved dynamic behaviour
M. Seifert +4 more
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A SVPWM control strategy for NPC three-level inverter
2011 IEEE Power Engineering and Automation Conference, 2011Based on six divided regions of space vectors, the potential position of the reference voltage vectors is firstly determined according to the principle of rotating vector normalization method. Then the effective time of three synthesized vectors is calculated by the principle of the volt-second balance principle.
null Keqing Qu +4 more
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The study of FPGA-based three-level SVM NPC inverter
2009 IEEE 6th International Power Electronics and Motion Control Conference, 2009In this paper, a scheme of FPAG-based three-level space vector modulation (SVM) inverter is proposed in details. Compared to the traditional two-level inverter, the three-level inverter using SVM control has superior performance though bringing about much computational complexity.
null Yun Wan, null Jianguo Jiang
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Transformerless PV Three Level NPC Central Inverter
2019Generally inverter is developed with centre on high reliability, low cost and mass-production for transformed electrical energy from the PV module to the grid. Basically the DC/AC inverters are used in grid connected photovoltaic energy production systems as the power processing interface between the electric grid and the photovoltaic energy source ...
Mohammed Yassine Dennai +2 more
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SVM of Three-Level NPC Inverter with Unbalanced DC-Link
2018 IEEE Energy Conversion Congress and Exposition (ECCE), 2018The performance of a Neutral Point Clamped converter is strongly influenced by the quality of the voltage balancing control across the dc-link capacitors. In the operating conditions with either unbalanced voltages or high voltage ripple, the harmonic content of the output voltages can increase if a proper modulation technique is not taken into account.
Umberto Abronzini +4 more
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State-feedback-with-PI control for NPC three-level inverter
2015 IEEE Applied Power Electronics Conference and Exposition (APEC), 2015A discrete state-feedback-with-PI control scheme is proposed for NPC three-level inverter. The discrepancy between two approaches to design the controller, one in continuous domain, the other in discrete plane, is discussed. By means of continuous transformation, a load current feed-forward decoupling strategy (LCFF) is successfully proposed in this ...
Xin Liu +3 more
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The Research and Simulation of Three-Level NPC Inverter
2016Compared with the commonly used sine-wave pulse width modulation (SPWM) method, the space vector pulse width modulation (SVPWM) method has higher utilization rate of DC voltage and smaller output waveform distortion. This paper describes the basic principle and control algorithm of three-level SVPWM.
Yuan Deng, Guangyao Jin
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An improved SVPWM strategy for three-level active NPC inverter
2017 12th IEEE Conference on Industrial Electronics and Applications (ICIEA), 2017An improved space vector PWM (SVPWM) strategy is proposed in this paper to balance the neutral-point voltage (NP) and reduce switching loss for three-level active neutral-point-clamped (ANPC) converter. Compared with the traditional SVPWM, the improved SVPWM strategy reduces the number of vectors and the switching frequency per cycle.
Chao Zhang +4 more
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Multi-mode Synchronized PWM Schemes for three-level NPC Inverter
2019 22nd International Conference on Electrical Machines and Systems (ICEMS), 2019The synchronous space vector pulse width modulation (SSVPWM) strategy for neutral-point-clamped three-level inverter is studied in this paper. Firstly, the composition principle of synchronous symmetric switching sequence is studied. Then, the switching sequences corresponding to each pulse number P are determined by reasonable partition of the space ...
Shengwen Fan +3 more
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Modelling of low inductive busbars for medium voltage three-level NPC inverter
2012 IEEE Power Electronics and Machines in Wind Applications, 2012Design of low inductive busbars for medium voltage Neutral Point Clamped (NPC) inverter is studied. In a hard-switched inverter the stray inductance causes various problems, such as over voltages, current unbalance, and possible resonance with DC-link capacitors.
Pyrhönen Juha +6 more
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