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Miniaturized, Ultra-Wideband and High Isolation Single Pole Double Throw Switch by Using π-Type Topology in GaAs pHEMT Technology

IEEE Transactions on Circuits and Systems - II - Express Briefs, 2021
In this brief, a compact ultra-wideband monolithic microwave integrated circuit single pole double throw (SPDT) switch with high isolation level and low insertion loss is presented.
Haoran Zhu   +4 more
semanticscholar   +1 more source

Testing Topology Adaptive Irrigation IoT with Circuits

International Symposium on Circuits and Systems, 2019
There is a significant unrealized potential in developing state of the art electronics for agriculture, particularly, for irrigation systems. However, development velocity in the domain of Irrigation Internet of Things (IrIoT) is slowed due to lengthy ...
Davit Hovhannisyan   +2 more
semanticscholar   +1 more source

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits

International Conference on Machine Learning
In the realm of electronic and electrical engineering, automation of analog circuit is increasingly vital given the complexity and customized requirements of modern applications. However, existing methods only develop search-based algorithms that require
Chen-Chia Chang   +7 more
semanticscholar   +1 more source

Practical Equivalent Electrical Circuit Identification for Electrochemical Impedance Spectroscopy Analysis With Gene Expression Programming

IEEE Transactions on Instrumentation and Measurement, 2021
Researchers relying on electrochemical impedance spectroscopy need to decide which equivalent electrical circuit to use to analyze their measurements.
Maxime Van Haeverbeke   +2 more
semanticscholar   +1 more source

Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology

IEEE Journal of Solid-State Circuits, 2021
This work presents a 3-D-integrated opto-electrical receiver (RX) analog front end (AFE) operating up to 50 Gb/s. The electronic integrated circuit (EIC) is fabricated in ST SiGe BiCMOS-55-nm technology and flipped and mounted on top of the ST photonic ...
Farhad Bozorgi   +5 more
semanticscholar   +1 more source

SchemaBoard: Supporting Correct Assembly of Schematic Circuits using Dynamic In-Situ Visualization

ACM Symposium on User Interface Software and Technology, 2020
Assembling circuits on breadboards using reference designs is a common activity among makers. While tools like Fritzing offer a simplified visualization of how components and wires are connected, such pictorial depictions of circuits are rare in formal ...
Yoon-Ji Kim   +7 more
semanticscholar   +1 more source

DocEDA: Automated Extraction and Design of Analog Circuits from Documents with Large Language Model

arXiv.org
Efficient and accurate extraction of electrical parameters from circuit datasheets and design documents is critical for accelerating circuit design in Electronic Design Automation (EDA).
Hong Cai Chen   +5 more
semanticscholar   +1 more source

Multiasynchronous Extended Dissipative Sliding Mode Control of LC Circuits in Grid-Connected System Under Actuator Attacks

IEEE Transactions on Circuits and Systems Part 1: Regular Papers
This article investigates the event-triggered multiasynchronous dissipative sliding mode control problem for the gird-connected systems, where the coupled Inductance-Capacitance (LC) oscillators in electrical networks are subject to actuator attacks and ...
Junyi Wang   +4 more
semanticscholar   +1 more source

A General Theory of Injection Locking and Pulling in Electrical Oscillators—Part I: Time-Synchronous Modeling and Injection Waveform Design

IEEE Journal of Solid-State Circuits, 2019
A general model of electrical oscillators under the influence of a periodic injection is presented. Stemming solely from the autonomy and periodic time variance inherent in all oscillators, the model’s underlying approach makes no assumptions about the ...
Brian Hong, A. Hajimiri
semanticscholar   +1 more source

Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part I

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
This article describes a systematic and scalable electrostatic discharge (ESD) verification methodology embodied in a tool called ESD IP Explorer that has been specifically implemented to cover the entire design flow and to comply with custom circuit ...
Benjamin Viale, B. Allard
semanticscholar   +1 more source

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