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Enhancing credit card fraud detection with a stacking-based hybrid machine learning approach. [PDF]

PeerJ Comput Sci
Marazqah Btoush EAL, Zhou X, Gururajan R, Chan KC, Alsodi O.   +4 more
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Federated learning with LSTM and error correcting codes for secure and private identification of IoT devices. [PDF]

Sci Rep
Alshaya SA.
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The coupling coordination relationship and obstacle factors of public cultural services and economic development: A case study of 31 regions in China. [PDF]

PLoS One
Xu B, Gu Z, Wang Z, Chen Y, Wang Y.
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Transaction level modeling: an overview

First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721), 2003
Recently, the transaction-level modeling has been widely referred to in system-level design community. However, the transaction-level models(TLMs) are not well defined and the usage of TLMs in the existing design domains, namely modeling, validation, refinement, exploration, and synthesis, is not well coordinated.
Gai, L., Gajski, D. D.
openaire   +3 more sources

Static analysis of transaction-level models

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451), 2003
The introduction of design languages, such as SystemC 2.0, that allow the modeling of digital systems at the transaction level will impose some major changes to the design flows. Since these formalisms allow for a higher level of abstraction in the systems description, new methodological tools will be needed to support all design phases.
AGOSTA, GIOVANNI, BRUSCHI, FRANCESCO, SCIUTO, DONATELLA   +2 more
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Analog transaction level modeling

2011 IEEE International High Level Design Validation and Test Workshop, 2011
Due to the better technology scaling of digital blocks compared to analog blocks, more and more parts of the analog implementation of modern IC designs are shifted to the digital domain, leading to mixed signal designs. However, no verification methodology, that considers the functional verification task of digital and analog blocks holistically ...
Alexander W. Rath, Volkan Esen, Wolfgang Ecker   +2 more
openaire   +1 more source

Transaction Level Modeling

2011
The rise of SoCs caused a paradigm shift on system design flow. The TLM methodology was created in the search for a new paradigm that could allow design representation at an intermediate level of abstraction between paper specification and RTL models. This chapter introduces the Transaction Level Modeling (TLM) design methodology. Its main goals are to
Sandro Rigo, Bruno Albertini, Rodolfo Azevedo   +2 more
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Transaction level modeling

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04, 2004
Transaction-level models (TLMs) address the problems of designing increasingly complex systems by raising the level of design abstraction above RTL. However, TLM terminology is presently a subject of contentious debate and a coherent set of TLM use-models have not been proposed.
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Accuracy-adaptive simulation of transaction level models

Proceedings of the conference on Design, automation and test in Europe, 2008
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platform simulation for design space exploration, and reference modelling for verification.
M. Radetzki, R. Salimi Khaligh
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