Results 11 to 20 of about 1,914,541 (354)
Hardware transactional persistent memory [PDF]
Proceedings of the International Symposium on Memory Systems, 2018 16 pages, 17 ...
Giles, Ellis +2 more
openaire +4 more sources
Safe Privatization in Transactional Memory [PDF]
ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming, 2018 Transactional memory (TM) facilitates the development of concurrent applications by letting the programmer designate certain code blocks as atomic. Programmers using a TM often would like to access the same data both inside and outside transactions, e.g.,
Artem Khyzha +3 more
openalex +3 more sources
Transactional Indexes on (RDMA or CXL-based) Disaggregated Memory with Repairable Transaction [PDF]
arXiv.org, 2023 The failure atomic and isolated execution of clients operations is a default requirement for a system that serve multiple loosely coupled clients at a server.
Xingda Wei +6 more
semanticscholar +1 more source
International Journal of Scientific Research in Computer Science Engineering and Information Technology, 2019 Transactional memory (TM) promises to simplify concurrent programming. Language-based constructs allow programmers to denote atomic regions declaratively.
V. M. Dhivya Shri, K Reshma
openalex +2 more sources
Efficient algorithms for persistent transactional memory
ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming, 2021 Durable techniques coupled with transactional semantics provide to application developers the guarantee that data is saved consistently in persistent memory (PM), even in the event of a non-corrupting failure.
P. Ramalhete, Andreia Correia, P. Felber
semanticscholar +1 more source
Hardware acceleration of number theoretic transform for zk‐SNARK
Engineering Reports, EarlyView., 2023 An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
Parallel Timing-driven Placement Algorithm for FPGA [PDF]
Jisuanji gongcheng, 2017 Traditional timing-driven Field Programmable Gate Array(FPGA) placement algorithm has some degree of error when calculating timing cost.Some timing-driven algorithms achieve better placement quality with a sacrifice of time.To deal with this problem,this
ZHANG Jiaqi,SHEN Jianliang,ZHU Ke
doaj +1 more source
Migration in Hardware Transactional Memory on Asymmetric Multiprocessor
IEEE Access, 2021 In this paper, a system is presented which implements transactions migration to an asymmetric multiprocessor in order to decrease the probability of conflicts and improve execution performance.
Zivojin Sustran, Jelica Protic
doaj +1 more source
Online algorithms for scheduling transactions on python software transactional memory [PDF]
Serbian Journal of Electrical Engineering, 2019 Designing online transaction scheduling algorithms is challenging because one needs to reconcile three opposing requirements: (i) they should be fast, (ii) they should minimize make span and maximize throughput, and (iii) they should produce ...
Popović Marko +3 more
doaj +1 more source
Query Dictionary for Frequent Non-Indexed Queries in HTAP Databases
IEEE Access, 2022 The increasing demand for the simultaneous transaction and review of the data for either decision making or forecasting has created a need for faster and better Hybrid Transactional/Analytical Processing (HTAP).
Sucharitha Shetty +2 more
doaj +1 more source