Results 121 to 130 of about 12,788 (255)

Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology

Advanced Intelligent Discovery, EarlyView.
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh, Raiyan Siddique, Sarah S. Sharif, Yaser Mike Banad   +3 more
wiley   +1 more source

Comprehensive Evaluation of Junctionless and Inversion-Mode Nanowire MOSFETs Performance at High Temperatures

IEEE Journal of the Electron Devices Society
This work aims to perform a comprehensive comparison of the electrical properties of junctionless and inversion-mode nanowires MOSFETS, fabricated with similar gate stack and state-of-art process, in the temperature range from 300 K to 580 K.
Rhaycen R. Prates, Sylvain Barraud, Mikael Casse, Maud Vinet, Olivier Faynot, Marcelo A. Pavanello   +5 more
doaj   +1 more source

Heterostructured Semiconductors for Advanced Chemical and Biochemical Sensors: From Gas Sensors to Electrolyte‐Gated Transistors

Advanced Physics Research, EarlyView.
Heterostructured semiconductors enable synergistic interactions between complementary materials, improving charge transport, analyte adsorption, and signal transduction in chemical and biochemical sensors. Their integration allows for high sensitivity, selectivity, stability, and low‐power operation across gas and liquid‐phase devices, while novel ...
Martin Schwellberger Barbosa, Allyster Rodrigues Silva, Hugo José Nogueira Pedroza Dias Mello   +2 more
wiley   +1 more source

The Trade‐Off between Transconductance and Speed for Vertical Organic Electrochemical Transistors

Advanced Electronic Materials
The high transconductance gm of organic electrochemical transistors (OECTs) has received widespread attention and made OECTs a valid candidate for wearable sensor systems.
Michael Skowrons, Andreas Schander, Alvaro Galeana Perez Negron, Björn Lüssem   +3 more
doaj   +1 more source

On the Design of a Class of Analog Filters Whose Impulse Response Is a Mittag‐Leffler Function

International Journal of Circuit Theory and Applications, EarlyView.
Fractional‐order filters whose impulse response is a Mittag‐Leffler (M‐L) function in any of its known forms are summarized in this work. Simulation results using Cadence and experimental results using an FPAA validate the introduced concept. ABSTRACT Fractional‐order filters whose impulse response is a Mittag‐Leffler (M‐L) function in any of its known
Julia Nako, Costas Psychalinos, Ahmed S. Elwakil, Brent J. Maundy   +3 more
wiley   +1 more source

Linearity and intermodulation distortion analysis of single and dual metal gate junctionless transistor

Heliyon
Linearity and intermodulation distortion are very crucial parameters for RFICs design. Therefore, in this work, a detailed comparative analysis on linearity and intermodulation distortion of single metal (SMG) and double metal (DMG) double gate junction ...
Bhaskar Awadhiya, Rahul Ratnakumar, Sampath Kumar, Sameer Yadav, Kaushal Nigam, Yashwanth Nanjappa, P.N. Kondekar   +6 more
doaj   +1 more source

A Co‐Designed Implicit‐Reset Path PFD and Current Mismatch Compensated CP Enabling Sub‐0.5% Mismatch and Dead Zone‐Free for Low‐Spur PLLs

International Journal of Circuit Theory and Applications, EarlyView.
A co‐designed implicit‐reset phase‐frequency detector (PFD) and nonlinear amplifier‐assisted charge pump (CP) achieve dead zone‐free operation from 10 MHz to 4.7 GHz with < 0.5% current mismatch without calibration, enabling −80 dBc of reference spur and 0.50 ps of RMS jitter in a 180 nm of CMOS PLL.
A. Ghaemnia, Jincheng Yang, Xiaojiong Fei, G. Zhang   +3 more
wiley   +1 more source

Subthreshold Time‐Mode All‐Digital DLL With Built‐In Linearization

International Journal of Circuit Theory and Applications, EarlyView.
This paper presents a subthreshold time‐mode all‐digital delay‐locked loop (DLL) for low‐frequency clock generation. The large and tunable delay of the DLL is obtained using a static inverter delay line whose supply voltage is in the vicinity of 100 mV and adjustable by varying supply voltage. Phase error is processed by a time‐mode proportional block (
Fei Yuan, Wenhao Wu, Yushi Zhou
wiley   +1 more source

Revealing the Impact of Gel Electrolytes on the Performance of Organic Electrochemical Transistors

Gels
Gel electrolyte-gated organic electrochemical transistors (OECTs) are promising bioelectronic devices known for their high transconductance, low operating voltage, and integration with biological systems.
Mancheng Li, Xiaoci Liang, Chuan Liu, Songjia Han   +3 more
doaj   +1 more source

An Ultra‐Low‐Power Biopotential Acquisition Analog Front‐End Chip for Wearable Devices

International Journal of Circuit Theory and Applications, EarlyView.
A 0.8‐V, 1.2‐μW biopotential AFE combines a chopper‐stabilized CCIA with dual‐time‐scale EDO management. The slow DSL preserves > 1 GΩ input impedance, whereas an event‐triggered fast‐recovery path shortens return to the linear range after abrupt electrode‐offset disturbances. ABSTRACT A 0.8‐V, 1.2‐μW biopotential analog front‐end (AFE) IC is presented
Zhang Xin, Yang Tianqi, Xu Wei, Wang Shun, Xiaoxi Ma   +4 more
wiley   +1 more source