Results 101 to 110 of about 2,134 (135)
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Transimpedance amplifiers for optoelectronic applications

IEEE Microwave Magazine, 2001
In this application note, the fundamental characteristics and issues related to the design of transimpedance amplifiers for optical receivers have been presented. Guidelines for the design of distributed transimpedance amplifiers have been outlined.
S. Parker, P. Shastry
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Transimpedance Amplifier Graphical Design Technique

2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), 2019
A transimpedance amplifier (TIA) graphical design technique including transimpedance gain, signal bandwidth, feedback loop stability, and noise performance is presented. The proposed graphical method allows for a more extensive design tradeoff analysis and is applicable to both compensated and decompensated opamps.
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CMOS Transimpedance Amplifier for Visible Light Communications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
Transimpedance amplifiers (TIAs) play a pivotal role in the optical wireless receiver front end. To exploit its distinctive open-loop characteristics, a feedback transimpedance amplifier comprising a feedforward current amplifier (CA-TIA) is investigated. Attributing to the small input impedance with a high-pass response of its feedforward gain element,
Roger Yubtzuan Chen, Zong-Yi Yang
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A 10-Gb/s Inductorless Transimpedance Amplifier

IEEE Transactions on Circuits and Systems II: Express Briefs, 2010
A new technique to design an inductorless transimpedance amplifier (TIA) is introduced. This technique uses N similar TIAs in parallel configuration to boost the overall bandwidth while keeping the transimpedance gain constant. Using this method, we design and implement a 10-Gb/s inductorless TIA with an active area of only 0.06 mm2 and a differential ...
Omeed Momeni   +2 more
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Cryogenic transimpedance amplifier for micromechanical capacitive sensors

Review of Scientific Instruments, 2008
We developed a cryogenic transimpedance amplifier that works at a broad range of temperatures, from room temperature down to 4 K. The device was realized with a standard complementary metal oxide semiconductor 1.5 μm process. Measurements of current-voltage characteristics, open-loop gain, input referred noise current, and power consumption are ...
D, Antonio   +3 more
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Transimpedance amplifier with PDCM and AGC

2007 7th International Conference on ASIC, 2007
A 1.25 Gb/s transimpedance amplifier(TIA) with high precision photodetector current monitor.(PDCM) and auto gain control(AGC) circuit is proposed. The PDCM circuit can get precision and linearity monitor voltage output. The AGC is less dependent on the alteration of devices parameter because of the design technology based on proportional parameter. The
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10Gbit/s 2mW inductorless transimpedance amplifier

2012 IEEE International Symposium on Circuits and Systems, 2012
This work presents the design and performance of a 10Gbit/s transimpedance amplifier (TIA) implemented in a 40nm CMOS technology. The introduced TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50Ω differential output driver to provide an interface to the measurement ...
Mohamed Atef, Horst Zimmermann
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Stagger Tuning for BW extension in Transimpedance Amplifiers

2020 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), 2020
This article explains Stagger tuning of two stage TIA. The method reduces effect of capacitances of the transistor. The process of stagger tuning has been shown using zero-pole analysis. The feasibility of the method is confirmed using CMOS technology (i.e. 90nm).
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Transimpedance Amplifier

2012
Mohamed Atef, Horst Zimmermann
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On the Noise Optimum of FET Broadband Transimpedance Amplifiers

IEEE Transactions on Circuits and Systems I: Regular Papers, 2012
The optimum sizing of the front-end FET in transimpedance amplifiers (TIA) is revisited. Analytical solutions based on a second-order shunt-feedback TIA model that includes the feedback-resistor noise are derived. It is shown that the optimum FET size can be smaller or larger than suggested by the well-known capacitive matching rule, depending on ...
openaire   +1 more source

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