Results 21 to 30 of about 805 (178)

Implementation of a Fully-Parallel Turbo Decoder on a General-Purpose Graphics Processing Unit

IEEE Access, 2016
Turbo codes comprising a parallel concatenation of upper and lower convolutional codes are widely employed in the state-of-the-art wireless communication standards, since they facilitate transmission throughputs that closely approach the channel capacity.
An Li, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo   +3 more
doaj   +1 more source

Efficient MAP-algorithm implementation on programmable architectures [PDF]

Advances in Radio Science, 2003
Maximum-A-Posteriori (MAP) decoding algorithms are important HW/SW building blocks in advanced communication systems due to their ability to provide soft-output informations which can be efficiently exploited in iterative channel decoding schemes like ...
F. Kienle, H. Michel, F. Gilbert, N. Wehn   +3 more
doaj  

Optimizing of Iterative Turbo Equalizer for Underwater Sensor Communication

International Journal of Distributed Sensor Networks, 2013
We presented an iterative turbo equalization to cope with intersymbol interference induced by reflection of sea level and sea bottom for underwater sensor communication channel. Iterative turbo equalizer consists of inner codes and outer codes; we employ
Ji Won Jung, Ki Man Kim
doaj   +1 more source

A Scalable Turbo Decoding Algorithm for High-Throughput Network-on-Chip Implementation

IEEE Access, 2016
Wireless communication at near-capacity transmission throughputs is facilitated by employing sophisticated Error Correction Codes (ECCs), such as turbo codes.
Ra'ed Al-Dujaily, An Li, Robert G. Maunder, Terrence Mak, Bashir M. Al-Hashimi, Lajos Hanzo   +5 more
doaj   +1 more source

1.5 Gbit/s FPGA Implementation of a Fully-Parallel Turbo Decoder Designed for Mission-Critical Machine-Type Communication Applications

IEEE Access, 2016
In wireless communication schemes, turbo codes facilitate near-capacity transmission throughputs by achieving reliable forward error correction. However, owing to the serial data dependencies imposed by the underlying logarithmic Bahl-Cocke-Jelinek-Raviv
An Li, Peter Hailes, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo   +4 more
doaj   +1 more source

Bacteria and Fungi Synergistically Reprogram Flavonoid Metabolites in the Pericarp of Citrus Reticulata 'Chachi' During Storage

Advanced Science, EarlyView.
The authors employed widely targeted metabolomics, microbial amplicon sequencing, and fermentation assays to investigate the microbiome 's influence on PCRC 's (pericarp of Citrus reticulata ' Chachi ') flavonoid profile over 0–19 years of storage. Based on the correlation analysis, solid‐state and liquid‐state fermentation, and catalytic activity ...
Jianmu Su, Sisheng Zhang, Lidi Liang, Haiyi Bai, Mei Bai, Hanjun He, Yayu Wang, Huan Liu, Xiangxiu Liang, Yu Sun, Hong Wu   +10 more
wiley   +1 more source

Method of assessing the information reliability of in 5G wireless transmission systems [PDF]

International Journal of Electronics and Telecommunications
The article proposes a method of assessing information transmission reliability by using the output normalized logarithmic ratio of the likelihood function (LRLF) of the decoder.
Vladyslav Vasylenko, Serhii Zaitsev, Yuliia Tkach, Oleksandr Korchenko, Ruslana Ziubina, Olga Veselska   +5 more
doaj   +3 more sources

OCIAD2 Stabilizes Integrin β1 Signaling Through SNX17‐Mediated Endosomal Recycling to Lipid Rafts and Modulates Cisplatin Response in HNSCC

Advanced Science, EarlyView.
This study identifies OCIAD2 as a critical regulator of cisplatin resistance in HNSCC. Mechanistically, OCIAD2 stabilizes integrin β1 through a direct physical interaction and facilitates its SNX17‐dependent endosomal recycling to lipid raft microdomains. Targeting OCIAD2 disrupts integrin β1 trafficking and significantly enhances cisplatin sensitivity,
Li Cui, Shanshan Si, Min Ye, Pei Lin, Meiyan Zou, Yunfan Lin, Xu Chen, Bing Guo, Wenjuan Sun, Xinyuan Zhao   +9 more
wiley   +1 more source

A memory reduced Turbo code decoding architecture design and FPGA implementation

Dianzi Jishu Yingyong, 2019
In order to satisfy the high-performance and low-power dissipation requirement in wireless communication, this paper proposes a low storage capacity and low-power dissipation Turbo decoder architecture based on the reverse recalculation and linear ...
Zeng Jie, Zhan Ming, Luo Xiaohong, Yang Chao, Deng Yi, Wang Meng   +5 more
doaj   +1 more source

On the Convergence Speed of Turbo Demodulation With Turbo Decoding [PDF]

IEEE Transactions on Signal Processing, 2012
Iterative processing is widely adopted nowadays in modern wireless receivers for advanced channel codes like turbo and LDPC codes. Extension of this principle with an additional iterative feedback loop to the demapping function has proven to provide substantial error performance gain.
Haddad, Salim, Baghdadi, Amer, Jezequel, Michel   +2 more
openaire   +3 more sources