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Power management verification experiences in Wireless SoCs
2011 Design, Automation & Test in Europe, 2011We look into the validation a power managed ARM Cortex A-8 core used in SoCs targeted for mobile segment. Low Power design techniques used on the chip include clock gating, voltage scaling, and power gating. We focus on the verification challenges faced in designing the processor core including RTL modeling of power switches, isolation, and level ...
Bhanu Kapoor +2 more
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Experiments in applying evolutionary algorithms to software verification
2008 IEEE Congress on Evolutionary Computation (IEEE World Congress on Computational Intelligence), 2008Complex concurrent systems present a significant challenge for software verification. If those systems are safety-critical, the need for software verification becomes particularly pressing, given the serious consequences of unforeseen defects. Complex concurrent systems are characterised by extremely large state spaces.
Woei Shyang Siaw +3 more
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Protocol verification using flows: An industrial experience
2009 Formal Methods in Computer-Aided Design, 2009We prove the parameterized correctness of one of the largest cache coherence protocols being used in modern multi-core processors today. Our approach is a generalization of a method we described last year that uses data type reduction and compositional reasoning to iteratively abstract and refine the protocol and uses invariants derived from protocol ...
John W. O'Leary +2 more
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Software Tools and their Verification by Experiments
Vehicle System Dynamics, 1993Abstract In the past years the tasks of simulation has changed rapidly in industrial practice. After static's and elastokinematics the dynamical simulation of complex mechatronic systems have to be done with the aim of precise prediction of vehicle behaviour, before it is realised in hardware.
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Boogie Meets Regions: A Verification Experience Report
2008We use region logic specifications to verify several programs exhbiting the classic hard problem for object-oriented systems: the framing of heap updates. We use BoogiePL and its associated SMT solver, Z3, to prove both implementations and client code.
Anindya Banerjee 0001 +2 more
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Intel’s Formal Verification Experience on the Willamette Development
2000In some ways, microprocessor design quality has improved tremendously since the’ 70’s and’ 80’s. It was not uncommon in those days to have to respin silicon five or ten times before the device exhibited even basic functionality. Microprocessors were designed by circuit designers directly into schematics, with little pre-silicon functional testing.
Robert P. Colwell, Bob Brennan
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An experiment in high level language microprogramming and verification
Communications of the ACM, 1981The STRUM system was created to apply software engineering techniques to microprogramming. It provides the tools that allow the microprogrammer to use high level language, structured programming, and formal program verification to create emulations for a horizontally microprogrammed computer.
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Verification of SECURE by Experiment
2021Peter R. Ciriscioli, George S. Springer
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Verification of a Building Simulator in Real Experiments
2023Karol Jablonski, Dariusz Bismor
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A Survey on Assertion-based Hardware Verification
ACM Computing Surveys, 2022Hasini Witharana +2 more
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