Results 101 to 110 of about 47,374 (229)

Power Minimisation Techniques for Testing Low Power VLSI Circuits (PhD Dissertation)

, 2000
Testing low power very large scale integrated (VLSI) circuits has recently become an area of concern due to yield and reliability problems. This dissertation focuses on minimising power dissipation during test application at logic level and register ...
Nicolici, N.
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VLSI architectures for turbo codes

, 1999
IEEE TRANSACTIONS ON VLSI ...
Ruo Roch, Massimo, Masera, Guido, Zamboni, Maurizio, Piccinini, Gianluca   +3 more
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Parallel Implementation of Neural Associative Memories on RISC Processors [PDF]

, 1994
Rückert U, Rüping S, Naroska E. Parallel Implementation of Neural Associative Memories on RISC Processors. In: Delgado-Frias JG, Moore WR, eds. VLSI for Neural Networks and Artificial Intelligence.
Delgado-Frias, J.G., Rückert, Ulrich, Naroska, E., Rüping, Stefan, Moore, W.R.   +4 more
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Opto-VLSI-based beamformer for radio-frequency phased-array antennas

, 2012
An Opto-VLSI-based tunable beamformer for radio frequency (RF) smart antennas is reported and its concept is demonstrated. RF beam steering is achieved by uploading appropriate phase holograms onto the Opto-VLSI processor so that RF true-time delays ...
S. Xiao (1847446), Budi Juswardy (23317630), F. Xiao (14026886), K. Alameh (23317633), W. Hu (6376013)   +4 more
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The SpiNNaker2 Chip: A Many-Core Platform for Flexible and Scalable Brain-Inspired Computing

IEEE Open Journal of Circuits and Systems
In deep learning, efficiency gets more and more important to compensate for the ongoing growth in model sizes and applications. Neuromorphic hardware has long been advocated as an upcoming alternative to deep networks, taking inspiration from the brain ...
Stefan Scholze, Johannes Partzsch, Sebastian Hoppner, Florian Kelber, Andreas Dixius, Marco Stolba, Sirine Arfa, Marc Berthel, Georg Ellguth, Jim Garside, Hector A. Gonzalez, Stephan Hartmann, Thomas Kiel-Hocker, Dongwei Hu, Matthias Jobst, Khaleelulla Khan Nazeer, Tim Langer, Chen Liu, Gengting Liu, Matthias Lohrmann, Mantas Mikaitis, Felix Neumarker, Amirhossein Rostami, Stefan Schiefer, Tilo Schubert, Delong Shang, Bernhard Vogginger, Yexin Yan, Steve Furber, Christian Mayr   +29 more
doaj   +1 more source

A Review of Bandwidth Enhancement Techniques for Die-to-Die Single-Ended Interfaces in Chiplets

IEEE Access
With the rapid development of artificial intelligence (AI) and high-performance computing (HPC), the demand for computational power is increasing exponentially.
Haitao You, Yixiang Chen, Li Zhang, Xiaofang Gao, Xinyu Wu, Tianyi Zhang, Shizeng Zhang, Dimitar Nikolov, Qiang Cui, Juin J. Liou   +9 more
doaj   +1 more source

A VLSI-design of the minimum entropy neuron [PDF]

, 2010
One of the most interesting domains of feedforward networks is the processing of sensor signals. There do exist some networks which extract most of the information by implementing the maximum entropy principle for Gaussian sources.
Brause, Rüdiger W.
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AI-Enhanced Wide Supply Voltage Bandgap Voltage Reference Circuit With Multi-Objective Optimization for Automotive Applications

IEEE Open Journal of Circuits and Systems
This paper presents a bandgap voltage reference (BGR) circuit with a wide supply voltage and temperature range, suitable for automotive applications.
U Chi-Wa, Zhaoxi Li, Cheng-Hou Cheong, Chon-Fai Lee, Chi-Seng Lam   +4 more
doaj   +1 more source

Opto-VLSI-based tunable photonic RF filter

, 2009
In this paper, an Opto-Very-Large-Scale-Integrated (Opto-VLSI) based tunable photonic radio frequency (RF) filter structure is proposed and numerically simulated.
Budi Juswardy (23317630), F. Xiao (14026886), K. Alameh (23317633)   +2 more
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VLSI and Technological Innovation [PDF]

, 1979
VLSI relies on a range of disciplines for its successful implementation. Two of the most important of these are still in their infant stages. A. Design methodologies to manage complexity. B. Architecture of ultra concurrent machines. Innovation in
Mead, Carver A.
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