Results 251 to 260 of about 125,675 (299)
Some of the next articles are maybe not open access.

Performance-constrained voltage assignment in multiple supply voltage SoC floorplanning

ACM Transactions on Design Automation of Electronic Systems, 2009
Using voltage island methodology to reduce power consumption for System-on-a-Chip (SoC) designs has become more and more popular recently. Currently this approach has been considered either in system-level architecture or postplacement stage. Since hierarchical design and reusable intellectual property (IP) are widely used, it is necessary to optimize ...
Meng-Chen Wu   +3 more
openaire   +1 more source

Improving Voltage Assignment by Outlier Detection and Incremental Placement

2007 44th ACM/IEEE Design Automation Conference, 2007
Design for low power has become a key requirement in today's SoC design, especially for mobile applications. Multi-Vdd is an effective method to reduce both leakage and dynamic power. In a multi-Vdd design, cells of different supply voltages are often grouped into a small number of voltage islands, in order to avoid complex power supply system and ...
Huaizhi Wu, Martin D. F. Wong
openaire   +1 more source

Technique for Transition Energy-Aware Dynamic Voltage Assignment

IEEE Transactions on Circuits and Systems II: Express Briefs, 2006
It is generally accepted that dynamic voltage scaling (DVS) is one of the most effective techniques in saving energy consumption. This work addresses an important DVS problem, which is the transition energy-aware voltage assignment (TE-VA) problem. Given a schedule of tasks, the TE-VA problem is to determine the voltages to be applied to the tasks, so ...
J.-U. Shin, T. Kim
openaire   +1 more source

Multi-Objective 3D Floorplanning with Integrated Voltage Assignment

ACM Transactions on Design Automation of Electronic Systems, 2017
Voltage assignment is a well-known technique for circuit design, which has been applied successfully to reduce power consumption in classical 2D integrated circuits (ICs). Its usage in the context of 3D ICs has not been fully explored yet although reducing power in 3D designs is of crucial importance, for example, to tackle the ever-present challenge ...
Johann Knechtel   +2 more
openaire   +1 more source

Optimal module and voltage assignment for low-power

Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005., 2005
Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study functional unit binding (or module assignment) given a scheduled data flow graph under a dual-V/sub dd/ framework.
Deming Chen, Jason Cong, Junjuan Xu
openaire   +1 more source

Rethinking Threshold Voltage Assignment in 3D Multicore Designs

2010 23rd International Conference on VLSI Design, 2010
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature and process variation plays havoc in achieving system level energy efficiency in such systems, complicating the task of power provisioning in 3D multicores.
Koushik Chakraborty, Sanghamitra Roy
openaire   +1 more source

Power controller with assigned or zero-voltage drop

Proceedings of the Institution of Electrical Engineers, 1979
An experimental controller is described in which the load is supplied through a series paraformer inductance. By rapid modulation of the inductance within the supply cycle a good waveform can be supplied to the load, when the source has an impaired waveform.
C.I.R. Blackwood, D. Midgley
openaire   +1 more source

Voltage Drop Aware Power Pad Assignment and Floorplanning for Multi-voltage SoC Designs

2013 International Conference on Computer-Aided Design and Computer Graphics, 2013
Multi-voltage technique is an effective way of power saving in system-on-a-chip (SoC) designs. However, as the technology nodes continue to shrink, the voltage drop constraint in multiple power domains presents serious obstacles in power/ground (P/G) network design of wire-bonding package.
Zhufei Chu   +3 more
openaire   +1 more source

A New Algorithm for Simultaneous Gate Sizing and Threshold Voltage Assignment

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2009
Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven heuristics or based on rounding continuous optimization solutions. Sensitivity-drive heuristics are easily trapped in local optimum and the rounding is subject to remarkable ...
Yifang Liu, Jiang Hu
openaire   +1 more source

Automated multi-device placement, I/O voltage supply assignment, and pin assignment in circuit board design

2013 International Conference on Field-Programmable Technology (FPT), 2013
Embedded systems often contain many components, some with multiple Field Programmable Gate Arrays (FPGAs). Designing Printed Circuit Boards (PCBs) for these systems can be a complex process that is often tedious, error-prone, and time-intensive. Existing computer-aided design tools require designers to manually insert components and explicitly define ...
Daniel P. Seemuth, Katherine Morrow
openaire   +1 more source

Home - About - Disclaimer - Privacy