Results 261 to 270 of about 125,675 (299)

A Novel Threshold Voltage Assignment for 3D Multicore Designs

Journal of Low Power Electronics, 2010
Chips organized in a 3D stack exhibit widely varying thermal characteristics, driven by the fundamental principles of heat flow. This heterogeneous thermal profile, in conjunction with the strong dependence of leakage with temperature and process variation, imposes a severe challenge of power provisioning in 3D multicore systems.
Koushik Chakraborty, Sanghamitra Roy
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NBTI-aware dual threshold voltage assignment for leakage power reduction

2012 IEEE International Symposium on Circuits and Systems, 2012
Dual threshold voltage (dual-Vth) assignment is recognized as a useful technique to reduce the leakage power. However, as the process technology shrinks to the deep sub-micron regime, the negative bias temperature instability (NBTI) effect becomes a serious concern.
Wen-Pin Tu, Shih-Wei Wu, Shih-Hsu Huang, Mely Chen Chi   +3 more
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Static leakage reduction through simultaneous threshold voltage and state assignment

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451), 2003
We propose a new method that uses a combined approach of sleep-state assignment and threshold voltage (Vt) assignment in a dual-Vt process. While each of these methods has previously been used individually, their combined effect has not been leveraged to date. By combining Vt and sleep-state assignment, leakage current can be dramatically reduced since
Dongwoo Lee, David Blaauw
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Noise-aware multiple-voltage assignment for gate-level power optimization

2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, 2008
Given a circuit netlist, based on the slack analysis in the netlist, the optimal voltage in a maximum slack-sharing cluster(MSC) can be obtained to maintain the performance of the netlist. Furthermore, according to the optimal voltages of all the MSCs and the constraints for multiple-voltage assignment, an efficient assignment approach is proposed to ...
null Jin-Tai Yan, null Zhi-Wei Chen, null Jos-Hua Luo   +2 more
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Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC

2009 International Conference on Computational Science and Engineering, 2009
Low energy consumption is a critical issue inembedded systems design. As the technology feature sizesof SoC (Systems on Chip) become smaller and smaller, thepercentage of leakage power consumption in total powerconsumption continues to grow. Traditional Dynamic VoltageScaling (DVS) fail to accurately address the impact of scaling on system power ...
Meikang Qiu, Laurence T. Yang, Edwin H.-M. Sha   +2 more
openaire   +1 more source

Successive Pad Assignment for Minimizing Supply Voltage Drop

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2005
An efficient pad assignment methodology to minimize voltage drop on a power distribution network is proposed. A combination of successive pad assignment (SPA) with incremental matrix inversion (IMI) determines both location and number of power supply pads to satisfy drop voltage constraint.
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Design of variable structure voltage regulator using pole assignment technique

IEEE Transactions on Automatic Control, 1994
In a power system, the role of a generator voltage regulator is to ensure that the output voltage is maintained within an acceptable threshold. In this paper a voltage regulator is proposed. The design of this regulator is based on both variable structure control theory and a pole assignment technique. The performance of the proposed regulator has been
Aggoune, M. E., Boudjemaa, F., Bensenouci, A., Hellal, A., Elmesai, M. R., Vadari, S. V.   +5 more
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Optimal Supply Voltage Assignment under Timing, Power and Area Constraints

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2010
Multiple supply voltage (MSV) assignment is a highly effective means of reducing power consumption. Many existing algorithms perform very well for power reduction. However, they do not handle the area issue of level shifters. In some cases, although one gets a superior result to reduce the power consumption, but many extra level shifters are needed to ...
Hsi-An CHIEN, Cheng-Chiang LIN, Hsin-Hsiung HUANG, Tsai-Ming HSIEH   +3 more
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Fine-grained post placement voltage assignment considering level shifter overhead

2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2010
Multi-Vdd techniques enable application of lower supply voltage levels on cells with timing slacks. New voltage assignment, placement and voltage island partitioning methods are needed for better utilization of this technology. Our experiments show that in order to have an effective post placement voltage island generation we need to directly consider ...
Zohreh Karimi, Majid Sarrafzadeh
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Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014
Soft errors, which have been a significant concern in memories, are now a main factor in reliability degradation of logic circuits. This paper presents a power-planning-aware methodology using dual supply voltages for soft error hardening. Given a constraint on power overhead, our proposed framework can minimize the soft error rate (SER) of a circuit ...
Kai-Chiang Wu, Diana Marculescu
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