Results 251 to 260 of about 61,828 (303)

Multiphase capacitor-diode voltage multiplier

1978 IEEE Power Electronics Specialists Conference, 1978
An N-phase by M-stage capacitor-diode voltage multiplier (CDVM) is described. The multiplier is failure tolerant and suitable for medium power applications. Total capacitor weight is significantly less than single-phase multipliers. Excellent correlation between test data and predicted values for output voltage, peak currents, and efficiency ...
R. M. Martinelli, A. F. Ahrens
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CMOS voltage-mode analog multiplier

2006 IEEE International Symposium on Circuits and Systems, 2006
This paper proposes a CMOS voltage-mode four-quadrant analog multiplier. It is based on a pair of diode-connected MOS transistor that is biased with a constant current source, and a CMOS voltage difference circuit. Simulation results shows that the linear range is /spl plusmn/400 mV with the linearity error of 0.8% and the harmonic distortion of 0.62%.
B. Boonchu, W. Surakampontorn
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Voltage multiplier with output stabilization

38th Midwest Symposium on Circuits and Systems. Proceedings, 2002
In this paper we present a charge-pump voltage multiplier with output regulation. Using this scheme we designed two voltage sources suitable for generating the high voltages required to program a flash memory using a single 5 V power supply. The first circuit can drive the selected memory word-line with the required voltage (10.5 V). The second circuit
C. Calligaro, P. Malcovati, G. Torelli
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Characteristics of Voltage-Multiplying Rectifiers

Proceedings of the IRE, 1944
A combined experimental and theoretical analysis is used to determine the manner in which the characteristics of the half-wave and full-wave voltage-doubling rectifier circuits depend upon the resistance of the diodes and upon the load resistance. The characteristic curves reproduced include those for the load voltage, ripple voltage, and maximum tube ...
D.L. Waidelich, C.L. Shackelford
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Pulsed Voltage Multiplier

Review of Scientific Instruments, 1962
A suggested multistage high voltage multiplier design utilizing a low duty cycle 10-kc pulse drive has been built, tested, and found reliably operable at twice the dc voltage gain per rectifier stage of conventional sine wave drive Cockcroft-Walton multipliers.
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Low-voltage electrochemical CO2 reduction by bacterial voltage-multiplier circuits

Chemical Communications, 2013
Using the voltage-multiplying circuits of chemolitho-autotrophic Fe-oxidizing bacteria (Mariprofundus ferrooxydans), we describe an integrated bioelectrochemical system that affords simultaneous CO2 reduction and H2O oxidation at an external voltage of less than 1.24 V.
Taketo, Mogi, Takumi, Ishii, Kazuhito, Hashimoto, Ryuhei, Nakamura   +3 more
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Voltage-Controlled Electron Multipliers

Proceedings of the IRE, 1941
The application of secondary-emission multiplication to conventional grid-controlled amplifier tubes is discussed from the viewpoints of practical voltage gain per stage of amplification, signal-to-noise ratio, and ultra-high-frequency applications. It is pointed out that the gain per stage is limited by the practical output current and the quotient of
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Multiplier offset voltages in adaptive arrays

1972 Antennas and Propagation Society International Symposium, 1972
This paper examines the effects of multiplier offset voltages in adaptive arrays. Multiplier offset voltages arise when active circuits are used to implement the error-by-signal multipliers required in an array based on the LMS algorithm. These offset voltages are known from experimental work to have a strong effect on array performance.
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A high voltage split source voltage multiplier with increased output voltage

2015 IEEE Applied Power Electronics Conference and Exposition (APEC), 2015
Building on the Half-Wave Cockcroft-Walton voltage multiplier, a topology is proposed that consists of several voltage multiplying sections fed separately at their inputs and whose output voltages are summated across the load. The proposed topology can attain over m times higher voltage gain (m being the splitting level).
Liran Katzir, Doron Shmilovitz
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Reduction of voltage drop and ripple in voltage multipliers

2015 17th European Conference on Power Electronics and Applications (EPE'15 ECCE-Europe), 2015
In this paper we present a novel topology for high voltage generation based on the widely used Half-Wave Cockcroft-Walton voltage multiplier. The proposed topology consists of several voltage multiplying sections fed separately at their inputs and whose output voltages are summated across the load. Using the proposed topology we can attain over m times
Se Hyun Park, Liran Katzir, Doron Shmilovitz   +2 more
openaire   +1 more source