Results 261 to 270 of about 61,828 (303)

Low-voltage programmable fir filters using voltage followers and analog multipliers

1993 IEEE International Symposium on Circuits and Systems, 2002
The VLSI implementation of discrete-time analog finite impulse response (FIR) filters using voltage followers and transconductance multipliers is addressed. The proposed approach allows operation at high frequencies (/spl sim/10 MHz) with low supply voltages, low power dissipation and low silicon area requirements.
J. Ramirez-Angulo, A. Diaz-Sanchez
openaire   +1 more source

A Hybrid Symmetrical Voltage Multiplier

IEEE Transactions on Power Electronics, 2014
Voltage multiplier circuits are widely used in many high-voltage/low-current applications. A conventional symmetrical voltage multiplier (SVM) has much better performance, when compared with its half-wave counterpart. However, it requires a high-voltage transformer (HVT) with center-tapped secondary to perform its push-pull kind of operation.
openaire   +1 more source

Low-voltage four-quadrant analog multiplier

38th Midwest Symposium on Circuits and Systems. Proceedings, 2002
A novel design method for four-quadrant analog multiplier is presented. This method uses two current-mode maximum selecting circuits to combine the output currents of two MOS square-based multiplier cells. The proposed scheme nearly doubles the input voltage range.
A. Motamed, C. Hwang, M. Ismail
openaire   +1 more source

High boost converter using voltage multiplier

31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005., 2005
With the increasing demand for renewable energy, distributed power included in fuel cells have been studied and developed as a future energy source. For this system, a power conversion circuit is necessary to interface the generated power to the utility.
null Ju-Won Baek, null Myung-Hyo Ryoo, null Tae-Jin Kim, null Dong-Wook Yoo, null Jong-Soo Kim   +4 more
openaire   +1 more source

A Direct-Current Voltage Multiplier

Review of Scientific Instruments, 1936
A device for obtaining a higher d.c. potential from a d.c. source is described. A number of condensers are connected permanently in series and charged successively by rotating brushes. The output voltage is shown to be quite steady under normal operating conditions. Equations for the output voltage and voltage fluctuation are derived.
openaire   +1 more source

Voltage efficiency of Schenkel type voltage multiplier circuit

Nuclear Instruments and Methods, 1969
Abstract The Schenkel type voltage multiplier circuit cannot be divided into four-terminal networks. Therefore the transmission line theory, by the aid of which the voltage efficiency for the Cockcroft-Walton type voltage multiplier circuit is obtained, cannot be applied directly.
openaire   +1 more source

Ultra low voltage current multiplier/divider

ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357), 2003
In this paper we present novel current-mode multiplier/divider circuits utilizing the features of FGUVMOS transistors. Even for ultra low supply voltages a proper operation is achieved with threshold shifting using post-fabrication tuning. Measured results are provided of a multiplier working over a large magnitude in current at 0.7 V power supply.
Y. Berg, T.S. Lande
openaire   +1 more source

Useful multipliers for low-voltage applications

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2003
Two useful low voltage multipliers are presented in this paper. They employ only two transistors between the rails and perform four-quadrant multiplication. These circuits are based on the V/sub gs//sup 2/ technique, and use MOS transistors in saturation in order to achieve squaring of the differential inputs.
B. Maundy, P. Aronhime
openaire   +1 more source

A 1.5 V CMOS voltage multiplier

1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196), 2002
New and simple CMOS multiplier powered with a 1.5 V supply is presented. It has a 3-dB cut-off frequency at 140 MHz, and reaches its 1-dB compression point for 140 mV/sub pp/ of input voltage. Moreover, its particular topology makes it useful for an integration in fully digital ICs.
G. Giustolisi, G. Palmisano, G. Palumbo
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Voltage-mode threshold-independent analogue multiplier

International Journal of Electronics, 2009
In this article, a new threshold-independent four-quadrant analogue multiplier is designed and developed. It is based on the square-law of the MOS transistor in the saturation region and quarter-square algebraic identity. The circuit structure uses voltage summing and voltage-mode squaring stages.
Boonchai Boonchu, Wanlop Surakampontorn
openaire   +1 more source