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Magnet wire life under voltage stress

1975 EIC 12th Electrical/Electronics Insulation Conference, 1975
The CIV of 18 AWG heavy build film insulated magnet wire is approximately 200 volts/mil at room temperature. Elevated temperature and aging time may reduce the CIV by over 50% depending on material, temperature, and specimen configuration.
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High-voltage line-dropping switching stresses

IEE Proceedings C Generation, Transmission and Distribution, 1992
Results are given of circuit-breaker restrike waveforms during no-load, live-line switching operations on a 362 kV network, together with laboratory tests of the early dielectric recovery of the circuit breaker. It is shown that the tendency to restrike is assisted by the excellent interrupting ability of the breaker when the initial transient recovery
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Voltage stability indices for stressed power systems

IEEE Transactions on Power Systems, 1993
The use of static voltage stability indices based on a singular value decomposition of the power flow Jacobian matrix and matrices derived from the Jacobian matrix is discussed. It is shown that such indices, together with the singular vectors, contain substantial and important information about the proximity to voltage instability and also about ...
Andersson, G, Hill, DJ, Loef, PA
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Silicon Dislocation Enhanced by Dynamic Voltage Stress

International Symposium for Testing and Failure Analysis, 2007
Abstract In reliability test some chips suffered functional failure. Through a series of failure analysis experiments, the root cause was determined to be a silicon dislocation across LDD (Lightly Doped Drain) area causing p-n junction leakage.
Yu-Cheng Lin   +5 more
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Optimizing Field Stress on High-Voltage Insulators

IEEE Transactions on Electrical Insulation, 1987
A method is described for optimizing the field stress on HV insulators by modifying their profile, seeking a uniform distribution of the tangential field among the insulator surface. This results in an increase of the onset voltage for surface flashover and in a significant saving of the space of the HV installation.
M. Abdel-Salam, E. K. Stanek
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A New Switched Capacitor 7L Inverter With Triple Voltage Gain and Low Voltage Stress

IEEE Transactions on Circuits and Systems II: Express Briefs, 2020
In this paper, a new switched capacitor based multilevel inverter topology is proposed. The proposed topology generates seven level (7L) output voltage using a single dc voltage source along with two floating capacitors. The output voltage of the proposed topology is three-times higher than the input voltage (i.e., gain factor of Vin:Vout = 1:3) along ...
Marif Daula Siddique   +4 more
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Transient Flat-Band Voltage Shifts Following High Voltage Stressing of Thin Oxides

MRS Proceedings, 1992
ABSTRACTIt has been shown that the transient decay of the current after removal of a high voltage stressing pulse changed from an exponential RC time constant decay to a very long decay that had a 1/t time dependence[l]. During these long transients the flat-band voltages of the capacitors changed as the traps inside the oxides discharged.
D. P. Wong, D. J. Dumin
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Electrical stresses in high voltage cable splice

1978 IEEE International Conference on Electrical Insulation, 1978
To insure good dielectric performance of a high voltage cable splice, electrical stresses at key locations need to be controlled and kept at a level where corona discharges will not occur during normal operation. The cable -splice interface, in general, is the weakest dielectric path.
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A method for dividing voltage stress of high voltage class E inverter

2015 IEEE International Telecommunications Energy Conference (INTELEC), 2015
In this paper, splitting of peak switch voltage by series connected transistors in the class E inverter is proposed. In this method, peak switch voltage of class E inverter is reduced to half of conventional because shunt capacitor voltage is divided by two switches. Key feature of this method is that drive signal source of each switch can be grounded.
Tadashi Suetsugu   +2 more
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Voltage and Current Stresses on HVDC Valves

IEEE Power Engineering Review, 1987
The important considerations that lead to a specific HVDC valve design for a given application are often not well appreciated. In this paper, voltage and current stresses on HVDC valves are discussed in the context of their importance in relation to the capabilities and limitations of modern power thyristors. It is concluded that a better understanding
openaire   +1 more source

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