Results 181 to 190 of about 436,378 (230)

Control of Wafer Scanners: Methods and Developments

American Control Conference, 2020
In this tutorial paper, control design aspects of wafer scanners used in the semiconductor industry will be highlighted. At the same time, challenges for control design development as to meet the ever increasing demands on accuracy and speed are ...
M. Heertjes, H. Butler, N. Dirkx, S. V. D. Meulen, R. Ahlawat, Kevin O'Brien, James Simonelli, Kuo-Tai Teng, Yingbo Zhao   +8 more
semanticscholar   +1 more source

Yield Improvement for 3D Wafer-to-Wafer Stacked ICs Using Wafer Matching

ACM Transactions on Design Automation of Electronic Systems, 2015
Three-Dimensional Stacked IC (3D-SIC) using Through-Silicion Vias (TSVs) is an emerging technology that provides heterogeneous integration, higher performance, and lower power consumption compared to traditional ICs. Stacking 3D-SICs using Wafer-to-Wafer (W2W) has several advantages such as high stacking throughput, high TSV density, and ...
Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen   +2 more
openaire   +1 more source

Wafer Level Camera technology - from wafer level packaging to wafer level integration

2010 11th International Conference on Electronic Packaging Technology & High Density Packaging, 2010
Increasing demand from consumers to integrate camera modules into electronic devices, such as cell phones, has driven the cost of camera modules down very rapidly. Now that most cell phones include at least one camera, consumers are starting to ask for better image quality and resolution - without compromising on the cost.
Hongtao Han, Moshe Kriman, Mark Boomgarden   +2 more
openaire   +1 more source

A Semi-Supervised and Incremental Modeling Framework for Wafer Map Classification

IEEE transactions on semiconductor manufacturing, 2020
Wafer map analysis provides critical information for quality control and yield improvement tasks in semiconductor manufacturing. In particular, wafer patterns of gross failing areas (GFA) are important clues to identify the causes of relevant failures ...
Yuting Kong, Dong Ni
semanticscholar   +1 more source

Getters films at wafer level for wafer to wafer bonded MEMs

Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS 2003., 2004
Low cost and reliability are the main important factors for the successful commercialization of MEMs devices. It is possible to decrease the cost of the MEMs device by shifting from ceramic packages down to wafer to wafer bonded MEMs. On the other hand, the ability to maintain the suitable environmental conditions either vacuum or inert gas inside the ...
M. Moraja, M. Amiotti
openaire   +1 more source

Defective wafer detection using a denoising autoencoder for semiconductor manufacturing processes

Advanced Engineering Informatics, 2020
Defective wafer detection is essential to avoid loss of yield due to process abnormalities in semiconductor manufacturing. For most complex processes in semiconductor manufacturing, various sensors are installed on equipment to capture process ...
Shu-Kai S. Fan, Chia-Yu Hsu, Chih-Hung Jen, Kuan-Lung Chen, Li-Ting Juan   +4 more
semanticscholar   +1 more source

Active Learning of Convolutional Neural Network for Cost-Effective Wafer Map Pattern Classification

IEEE transactions on semiconductor manufacturing, 2020
Wafer maps provide important information for engineers for detecting root causes of failure in a semiconductor manufacturing process. Thus, there has been active research into the automation of wafer map pattern classification.
Jaewoong Shim, Seokho Kang, Sungzoon Cho
semanticscholar   +1 more source

Temporary wafer carrier for thin wafer handling

2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D), 2017
We present a novel design of re-usable wafer carrier for safe manual or robotic handling of wafers from tens of μm in thickness. The carrier wafer stack then remains stable through a wide variety temperature, pressure and chemical environments. The carried wafer can then be easily debonded in a bespoke debonding tool with no residue or cleaning steps.
V. Masteika, T. Rogers, R. Santilli
openaire   +1 more source

A Novel Method Based on Deep Convolutional Neural Networks for Wafer Semiconductor Surface Defect Inspection

IEEE Transactions on Instrumentation and Measurement, 2020
Semiconductor wafer is widely used in welding robot, spray robot, unmanned material delivery vehicle, and detection station sensor. The defects of semiconductor wafer, such as stains, burrs, scratches, and holes generated in the manufacturing process ...
Guojun Wen, Zhi-jun Gao, Qi Cai, Yudan Wang, Shuang Mei   +4 more
semanticscholar   +1 more source

Diamond Wire Wafering: Wafer Morphology in Comparison to Slurry Sawn Wafers

2010
Large attention is currently paid to the forthcoming diamond wire wafering technology, which shows a number of important advantages compared to the slurry based technology. Industrial diamond wire wafering solutions profit mainly from higher throughput, simpler processes and reduced production costs.
Bidiville, A., Heiber, J., Wasmer, K., Habegger, S., Assi, F.   +4 more
openaire   +1 more source