Results 201 to 210 of about 436,378 (230)

Advances in machine learning and deep learning applications towards wafer map defect recognition and classification: a review

Journal of Intelligent Manufacturing, 2022
Tong-Kyu Kim, K. Behdinan
semanticscholar   +1 more source

Direct Wafer Bonding of Preamorphized Silicon Wafers.

MRS Proceedings, 1995
AbstractThis paper presents the comparison of the structural and electrical characteristics of Si/Si bonded interfaces depending on whether the surface layers were rendered amorphous by high dose ion implantation prior to annealing or not. While the general structure of the interfaces is the same when the wafers are preamorphized more precipitates are ...
A. Laporte, G. Sarrabayrouse, M. Benamara, A. Claverie, A. Rocher, L. Lescouzères, A. PeyreLavigne   +6 more
openaire   +1 more source

Test Wafer Management and Automated Wafer Sorting

2008 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 2008
Typical usage of test wafers (TW) in semiconductor manufacturing involves testing and development of new processes, equipment qualification, and process monitoring activities. A 300 mm fab can potentially spend millions of dollars each year purchasing test wafers.
Aziza Faruqi, Raymond Goss, Diwas Adhikari, Thomas Kowtsch   +3 more
openaire   +1 more source

Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

2010 IEEE International 3D Systems Integration Conference (3DIC), 2010
In this paper the integration challenges related to oxide-oxide bonding for wafer-to-wafer stacking technology are discussed. Furthermore, interface defectivity, wafer-to-wafer alignment and bond strength data are presented.
Gweltaz Gaudin, Gregory Riou, Didier Landru, Catherine Tempesta, Ionut Radu, Mariam Sadaka, Kevin Winstel, Emily Kinser, Robert Hannon   +8 more
openaire   +1 more source

Wafer-to-Wafer Bonding

2022
Laura Oggioni, Matteo Garavaglia, Luca Seghizzi   +2 more
openaire   +1 more source

Minimum Silicon Wafer Thickness for ID Wafering

Journal of The Electrochemical Society, 1982
An analytical model, based on fracture mechanics analysis, is proposed for estimating the minimum wafer thickness as a function of the diameter requirement for solar cells. The conditions under which the model can be applied are discussed with reference to the critical flaw size, the applied force, and the width of the side support.
openaire   +1 more source

Wafer-to-wafer bonding for microstructure formation

Proceedings of the IEEE, 1998
Wafer-to-wafer bonding processes for microstructure fabrication are categorized and described. These processes have an impact in packaging and structure design. Processes are categorized into direct bonds, anodic bonds, and bonds with intermediate layers. Representative devices using wafer-to-wafer bonding are presented.
openaire   +1 more source

Automated wafer transport in the wafer Fab

1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop ASMC 97 Proceedings, 2002
Through simulations with models, HP's Inkjet Supplies Business Unit has determined that intrabay material transport with automated delivery of wafers directly to process tools substantially increases the throughput of our semiconductor manufacturing facility (Fab).
openaire   +1 more source

Wafer Bumping & Wafer Level Packaging for 300mm Wafer

2006 Thirty-First IEEE/CPMT International Electronics Manufacturing Technology Symposium, 2006
Thomas Oppert, Elke Zakel, Thorsten Teutsch   +2 more
openaire   +1 more source

Wafers

Notes and Queries, 1937
  +4 more sources