Results 21 to 30 of about 79 (79)
Power Consumption Models for Decimation FIR Filters in Multistandard Receivers
VLSI Design, Volume 2012, Issue 1, 2012., 2012 Decimation filters are widely used in communication‐embedded systems. In fact, decimation filters are useful for implementing channel filtering or selection with low‐computation complexity requirements. Many multistandard receiver designs that are required in ubiquitous embedded systems are based on a cascade of decimation filter processing.
Khaled Grati +4 more
wiley +1 more source
Behavioural Neurology, Volume 25, Issue 3, Page 205-213, 2012., 2012 The first reports of phonological, surface and deep dyslexia come from orthographies containing quasi‐regular mappings between orthography and phonology including English and French. Slovakian is a language with a relatively transparent orthography and hence a mostly regular script.
Marianna Hricová, Brendan Stuart Weekes
wiley +1 more source
International Scholarly Research Notices, Volume 2012, Issue 1, 2012., 2012 This paper addresses the problem of global asymptotic stability of a class of uncertain discrete‐time state‐delayed systems employing generalized overflow nonlinearities. The systems under investigation involve parameter uncertainties that are assumed to be deterministic and norm bounded.
V. Krishna Rao Kandanvli +5 more
wiley +1 more source
International Scholarly Research Notices, Volume 2012, Issue 1, 2012., 2012 This paper proposes a novel antiwindup controller for 2D discrete linear systems with saturating controls in Fornasini‐Marchesini second local state space (FMSLSS) setting. A Lyapunov‐based method to design an antiwindup gain of 2D discrete systems with saturating controls is established. Stability conditions allowing the design of antiwindup loops, in
Richa Negi +5 more
wiley +1 more source
An Automated Fixed‐Point Optimization Tool in MATLAB XSG/SynDSP Environment
International Scholarly Research Notices, Volume 2011, Issue 1, 2011., 2011 This paper presents an automated tool for floating‐point to fixed‐point conversion. The tool is based on previous work that was built in MATLAB/Simulink environment and Xilinx System Generator support. The tool is now extended to include Synplify DSP blocksets in a seamless way from the users′ view point.
Cheng C. Wang +4 more
wiley +1 more source
Architectural Synthesis of Fixed‐Point DSP Datapaths Using FPGAs
International Journal of Reconfigurable Computing, Volume 2009, Issue 1, 2009., 2009 We address the automatic synthesis of DSP algorithms using FPGAs. Optimized fixed‐point implementations are obtained by means of considering (i) a multiple wordlength approach; (ii) a complete datapath formed of wordlength‐wise resources (i.e., functional units, multiplexers, and registers); (iii) an FPGA‐wise resource usage metric that enables an ...
Gabriel Caffarena +5 more
wiley +1 more source
Hardware Implementation of Digital Signal Processing Algorithms
, 2013 Journal of Electrical and Computer Engineering, Volume 2013, Issue 1, 2013.
Ashkan Ashrafi +2 more
wiley +1 more source
Design and Implementation of a Hardware Module for MIMO Decoding in a 4G Wireless Receiver
VLSI Design, Volume 2008, Issue 1, 2008., 2008 Future 4th Generation (4G) wireless multiuser communication systems will have to provide advanced multimedia services to an increasing number of users, making good use of the scarce spectrum resources. Thus, 4G system design should pursue both higher‐transmission bit rates and higher spectral efficiencies. To achieve this goal, multiple antenna systems
Alberto Jiménez-Pacheco +3 more
wiley +1 more source
Selected Papers from ReConFig 2008
, 2009 International Journal of Reconfigurable Computing, Volume 2009, Issue 1, 2009.
Lionel Torres, Cesar Torres
wiley +1 more source
Second language attainment and first language attrition: The case of VOT in immersed Dutch-German late bilinguals. [PDF]
Second Lang Res, 2017 Stoehr A +3 more
europepmc +1 more source