Introduction

Mobile and portable devices are becoming increasingly essential parts of our daily lives, and there has been a growing emphasis on minimizing their power consumption owing to the dependency on batteries. For this purpose, variable refresh rate (VRR) is applied to active-matrix organic light-emitting diode (AMOLED) displays1,2, in which different refresh rates are used according to the display scenario3,4,5. For instance, a high refresh rate is used for scenarios such as watching videos or playing games to enhance moving picture quality6,7, whereas a low refresh rate is applied to static screens to lower the power consumption of the source driver integrated circuit (IC), which can dramatically reduce the overall power use.

In VRR driving, the luminance gradually changes in each time frame during low-frequency driving, leading to the flicker phenomenon8,9,10. In particular, the lower the frequency of these luminance changes, the easier it is for the human eye to perceive flickering11,12,13,14. Therefore, luminance fluctuations within the refresh rate range of 1–20 Hz are more noticeable to the human eye and can induce eye fatigue more easily than rapid luminance changes within the refresh rate range of 60–120 Hz refresh rates15.

Such flickering has been primarily attributed to the leakage current at the gate node of low-temperature poly-Si (LTPS)-based driving thin-film transistors (D-TFTs)16,17. Therefore, various studies have been conducted to utilize low-temperature poly-Si and oxide (LTPO) pixel structures using indium gallium zinc oxide (IGZO) channels with low-leakage current characteristics18,19,20,21,22,23,24,25. To mitigate the flicker issue, oxide TFTs with lower leakage current characteristics are connected to the D-TFT gate. However, the luminance continues to increase during skip frames where image data are not updated. Thus, it is suspected that factors other than the leakage current may contribute to this phenomenon. However, no clear interpretation or solution has been presented, and it is necessary to identify and solve the causes of the flickering phenomenon at low frequencies.

In this study, we analyze the mechanism of the low-frequency flicker phenomenon and present a novel driving method to minimize it. The cause of the flicker was investigated by observing the luminance waveforms while varying the driving voltage and timing. The compensation scheme in this study was verified to improve the flickering by applying a variable reset voltage (VRV) within the skip frame, which was measured on actual panels.

Operating principle of the LTPO panel

Figure 1 illustrates the concept of the refresh rate control, where the gate signal was set at 120 Hz. Using this concept, various refresh rates could be implemented by adjusting the number of skip frames. For instance, when playing a video, the number of skip frames was set to zero with a driving frequency of 120 Hz (Fig. 1a), whereas for static images such as text on the website, the number of skip frames was set to 11 with a driving frequency of 10 Hz (Fig. 1b). In the always-on display (AoD) mode, the number of skip frames increased to 119, allowing a significant power consumption reduction with a driving frequency as low as 1 Hz (Fig. 1c).

Fig. 1
figure 1

Concept of variable refresh rate (VRR); the number of skip frames varies depending on the operating frequency: (a) no skip frames at 120 Hz, (b) 11 skip frames per 12 frames at 10 Hz, and (c) 119 skip frames per 120 frames at 1 Hz. Figure was created based on free-license images and further processed using Microsoft PowerPoint (Microsoft 365, https://www.microsoft.com/powerpoint).

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As shown in Fig. 2a, the gate in panel (GIP) block consists of five shift registers, and the link region is composed of the voltage lines. The S3 GIP block is designed with a 1-row and dual-feeding structure to enable VDATA sampling during 1-horizontal (1 H) time. In contrast, the EM, S1, S2, and S4 GIP blocks adopt a 2-row sharing and single-feeding structure to minimize the bezel size. Furthermore, the voltage lines in the link region are designed with a mesh routing structure that connects to all pixels. Figure 2b depicts the schematics of the LTPO AMOLED pixel circuit configured as 8T1C. In this circuit, T1 and T2, which are connected to the D-TFT gate node, are oxide TFTs, whereas the D-TFTs and T3–T7 are p-channel LTPS TFTs. Figure 2c illustrates the GIP signal control method within the pixel circuit, detailing the operations at each step. The driving voltages used in the evaluation are listed in Table 1. Here, VDD and VSS are the supply voltages and VGH and VGL are the high- and low-gate voltages, respectively. where VINT is the initial voltage, VRST is the reset voltage, and VDATA is the data voltage. The operating principles are described in detail as follows:

Fig. 2
figure 2

(a) Block diagram of the GIP circuit. (b) Circuit schematics of LTPO pixel structure. (c) GIP timing diagrams of refresh frame and skip frame.

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Table 1 Driving voltages in evaluation of LTPO pixel structure.
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N4 initial

When the emission (EM) switch (SW) is turned off, the current flowing through the OLED disappears, and it does not emit light. Subsequently, when the S4 SW is turned on, the OLED anode node (N4) is initialized with the VINT voltage passing through T5 to prevent the OLED from emitting light owing to residual charges. In addition, a high VRST voltage is applied to the D-TFT source node (N1) through T4 to reduce the hysteresis effect in the next frame VDATA sampling caused by the previous frame VDATA26,27,28,29,30,31.

N2 initial

When S2 is turned on, the D-TFT gate node (N2) is initialized with the VINT voltage through T2. This initializes the previous frame VDATA.

N3 initial

When S1 and S2 are turned on, the D-TFT drain node (N3) is initialized with the VINT voltage through T1 and T2.

VDATA sampling

When S1 and S3 are turned on, VDATA is charged to the D-TFT gate node (N2) through T1 and T3. The voltage charged at the D-TFT gate node can be expressed by Eq. (1), where VG is the gate voltage of the D-TFT, and VTH is the threshold voltage of the D-TFT.

$$\:{V}_{G}={V}_{DATA}-\left|{V}_{TH}\right|$$
(1)

N1 reset

When S4 is turned on, a high VRST voltage is applied to the D-TFT source node (N1) through T4. This reduces the difference in the VTH change of the D-TFT caused by the hysteresis before the emission of the refresh and skip frames.

Emission

When the EM SW is turned on, the D-TFT current can be expressed using Eq. (3), which is based on Eqs. (1) and (2), where VS is the source voltage of the D-TFT, µ is the carrier mobility, COX is the gate oxide capacitance per unit area, and W and L are the channel width and channel length, respectively. VSG is the source-gate voltage of the D-TFT.

$$\:{V}_{S}={V}_{DD}$$
(2)
$$\begin{aligned} {I}_{OLED} &={\frac{1}{2}\mu\:C}_{OX}\frac{W}{L}({V}_{SG}-\left|{V}_{TH}\right|{)}^{2} \\ &={\frac{1}{2}\mu\:C}_{OX}\frac{W}{L}({V}_{DD}-{V}_{DATA}{)}^{2}\end{aligned}$$
(3)

Results and discussion

Measurement

For the measurements, 6.5” AMOLED displays with quad high-definition (QHD) resolution and 8T1C compensation pixel structures were used. Optical measurements were performed using a KONICA MINOLTA CA-427, and the sampling rate of the measurement was set to 3 k/s. Measurements were conducted at the center of the panel using a 100 cd/m2 solid pattern. The normalized luminance was moving-averaged, equivalent to a single frame at 120 Hz, which was as effective as a low-pass filter. A moving average was used to filter out high-frequency elements that cause unnecessary disturbances when analyzing luminance trends within a frame. In Fig. 3a, it can be observed that the luminance gradually increases in the skip frames at both 1 and 10 Hz. This indicates that a severe flickering phenomenon is evident in a user environment that requires low-frequency driving, as shown in Fig. 3b. At 1 Hz, the number of skip frames is larger than that at 10 Hz, leading to a more severe flickering phenomenon. To determine the main cause of the increase in luminance during low-frequency driving, two evaluations were conducted.

Fig. 3
figure 3

(a) Luminance waveforms with a 100 cd/m2 solid pattern of 10 Hz and 1 Hz. (b) Schematic of the flicker phenomenon depending on user scenarios with different frequencies: web surfing at 10 Hz, and AoD at 1 Hz.

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First, to evaluate the impact of oxide TFTs, the GIP timing of oxide TFTs was not toggled in the skip frame, and the reset times for the refresh and skip frames were kept identical, as shown in Fig. 4a. The luminance waveform in Fig. 4c shows a gradual increase in luminance, indicating that the brightness is not saturated but continues to increase over a long-term period. Second, to evaluate the impact of D-TFTs, the GIP timing was set identically for the refresh and skip frames, but the reset times were different, as shown in Fig. 4(b). In this case, the refresh occurred even during the skip frame. The luminance waveform in Fig. 4d shows that the luminance rapidly decreases and saturates within a short period. The bias stress duration of the reset time in the skip frame (TRST_B) is longer than that in the refresh frame (TRST_A). This causes a stronger hysteresis effect in the D-TFT during the skip frame. Therefore, at the transition from the refresh frame to the skip frame, |VTH| increases and luminance decreases. However, in the latter part of the skip frames, where there is no difference in bias stress duration, this effect disappears.

Fig. 4
figure 4

GIP timing diagrams of the refresh and skip frame for evaluating the impact of (a) oxide TFTs and (b) D-TFTs. Luminance waveforms at 10 Hz for evaluating the impact of (c) oxide TFTs and (d) D-TFTs.

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Thus, it is determined that the impact of oxide TFTs is relatively long term, whereas that of D-TFT hysteresis is short term. Consequently, the increase in luminance caused by the oxide TFTs becomes more pronounced during low-frequency driving.

Slow transient de-trapping of oxide TFTs

We conducted an evaluation for the impact of leakage current in the drain-to-source direction of the oxide TFT by varying VINT and analyzing the luminance waveforms. As shown in Fig. 5, even when VINT is lowered to enhance the effect of leakage current, the luminance waveform remains unchanged, indicating that the impact of leakage current is minor. Therefore, the long-term luminance variation is interpreted as a result of persistent de-trapping rather than leakage current.

Fig. 5
figure 5

Luminance waveforms at 1 Hz for varying VINT to analyze the impact of leakage current of the oxide TFT.

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Figure 6a illustrates the mechanism by which the luminance increases due to oxide TFTs. When oxide TFTs are turned on during the refresh frame and then turned off, the trapped carriers accumulated in the channel are de-trapped towards the source and drain nodes, which lowers the potential at these nodes. Electrons are initially captured rapidly in shallow traps, but some transition to deep traps, leading to de-trapping that can persist for several seconds depending on various factors, including trap states and interface quality resulting from impurities or defects during the manufacturing process32,33,34,35. This slow transient de-trapping leads to a gradual decrease in the potential at the D-TFT gate node during the skip frame, causing an increase in the OLED current (IOLED), and consequently, an increase in luminance. Figures 6b and c show the SmartSpice simulation results, indicating that the IOLED continues to increase during the skip frame owing to the lowered potential at N2, regardless of whether the driving frequency is at 10 Hz–1 Hz. Thus, the phenomenon of increase in luminance in low-frequency driving aligns with the slow transient de-trapping phenomenon of oxide TFTs.

Fig. 6
figure 6

(a) Slow transient de-trapping of oxide TFTs after bias transition. Simulation results showing continuous increase of IOLED during skip frames at (b) 10 Hz and (c) 1 Hz.

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Hysteresis of D-TFTs

To investigate the D-TFT hysteresis effect, evaluations were conducted using various reset timings and voltages. For the first evaluation, we fixed TRST_A at 12 H time and varied TRST_B. We analyzed the luminance waveforms by adjusting the S4 gate signal. Figure 7a shows the adjustment of the reset time applied to the skip frame at three conditions: 52, 32, and 6 H. Figure 7c shows the peak-to-peak luminance variation during a single frame at 10 Hz when TRST_B is set to 52, 32, and 6 H. The longer the TRST_B is, the stronger the D-TFT hysteresis effect in the skip frame, leading to a decrease in luminance owing to the increase in |VTH|. In this test, both the reset voltages for the refresh frame (VRST_A) and skip frame (VRST_B) were 5.5 V. Because the peak-to-peak luminance variation is zero at a TRST_B of 40 H, it can be considered the optimal point for TRST_B.

Fig. 7
figure 7

(a) Timing diagrams for the reset timing test. (b) Reset voltages for the reset voltage test. Peak-to-peak luminance variation in a 10 Hz solid pattern with varying (c) reset timing and (d) reset voltage for the skip frame.

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For the second evaluation, VRST_A was fixed at 5.5 V and VRST_B was varied to observe the luminance waveforms. Figure 7b shows the adjustment of the reset voltage applied to the skip frame at three conditions: 5.8, 5.5, and 5.2 V. Figure 7d shows the peak-to-peak luminance variation during a single frame at 10 Hz when VRST_B is set to 5.8 V, 5.5 V, and 5.2 V. Similar to the results of the first evaluation regarding reset timing, the higher VRST_B is, the stronger the D-TFT hysteresis effect becomes in the skip frame, resulting in a decrease in luminance as |VTH| increases. In this test, TRST_A and TRST_B were set to 12 and 32 H, respectively. The peak-to-peak luminance variation is 0 at a VRST_B of 5.6 V, which can be considered the optimal point for VRST_B.

D. Improvement of Flicker with the VRV Compensation Scheme.

From the analysis of low-frequency luminance waveforms based on different reset timings and voltages, it was confirmed that the flicker phenomenon at 10 Hz can be improved by suppressing the increase in luminance due to the slow transient de-trapping of oxide TFTs by controlling the reset timing or voltage during skip frames. However, the hysteresis effect of the D-TFT is short. Therefore, its impact on luminance depends on the driving frequency. For instance, optimizing VRST_B for 10 Hz driving using 11 skip frames improves 10 Hz flicker, but 1 Hz driving using 119 skip frames still causes large luminance fluctuations owing to the slow transient de-trapping of oxide TFTs. Figures 8a and b show the 10 Hz and 1 Hz luminance waveforms, respectively, when an optimized VRST_B is applied for 10 Hz driving. Applying this VRST_B at 1 Hz causes a strong increase in luminance and similarly results in serious flickering.

Fig. 8
figure 8

Luminance waveforms at (a) a 10 Hz solid pattern and (b) a 1 Hz solid pattern with VRST_B optimized for 10 Hz driving.

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To improve this, we first tried to compensate for the increase in luminance by extending the reset time applied in the latter part of the 1 Hz skip frame (12th − 119th ), but the S4 on-timing margin during the EM off state of the skip frame was insufficient. Accordingly, a strategy to adjust the reset voltage applied in the latter part of the 1 Hz skip frame (12th − 119th ) was adopted. Figure 9 shows the concept of VRV, where VRST_C is additionally introduced for voltage-compensated driving. The frame sync signal is counted to set the number of the skip frame from which VRST starts changing, and the frame counter is reset at every vertical synchronization (Vsync) cycle. The variable VRST is adjusted by modifying the bias of the low-dropout (LDO) regulator, which is connected to a digital-to-analog converter (DAC). This allows the voltage to be controlled according to the input lookup table (LUT) digital code. After optimizing VRST_B to offset the increase in luminance during 10 Hz driving, a higher VRST_C voltage is applied from the 12th skip frame to reduce the 1 Hz increase in luminance. As skip frames after the 12th cycle are only used at driving frequencies below 10 Hz, they have no impact on driving between 120 Hz and 10 Hz and can only suppress the increase in luminance at lower driving frequencies, where the number of skip frames significantly increases when driving below 10 Hz.

Fig. 9
figure 9

VRV compensation method with sequentially increasing VRST applied in skip frames.

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Figure 10 shows the luminance waveforms and frequency response characteristics when the new driving scheme with VRV is applied. Figure 10a shows the reference luminance waveform at 1 Hz when an optimized VRST_B for 10 Hz driving is applied. Figure 10b shows the 1 Hz luminance waveform when VRST_C, which is 25 mV higher than VRST_B, is applied after 100 ms, representing a single VRV. Although the increase in luminance was improved compared with the reference luminance waveform, the increase in luminance component is still observed in the latter half of the skip frame. Figure 10c shows the 1 Hz luminance waveform when VRST_C is applied after 100 ms, and VRST_D, which is 25 mV higher than VRST_C, is applied after 550 ms, representing a dual VRV. It was confirmed that the flicker characteristics significantly improved compared to the reference luminance waveform. Figure 10d shows the results of examining the luminance amplitude through the Fourier transformation of each luminance waveform. When VRST_C and VRST_D are applied, the frequency components in the range of 1–6 Hz are reduced to less than half of the reference.

Fig. 10
figure 10

Luminance waveforms at 1 Hz solid pattern: (a) without VRV, (b) with single VRV, and (c) with dual VRV. (d) Frequency response of luminance waveforms depending on VRV application.

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Conclusion

In this study, we propose a novel scheme of applying VRV to improve the flickering phenomenon at low frequencies in LTPO AMOLED displays. Despite using oxide TFTs with low leakage current characteristics as switching TFT in LTPO AMOLED displays, problems exist for low-frequency driving. This is because the luminance continuously increases in skip frames owing to the slow transient de-trapping of oxide TFTs, which is challenging to compensate for. In our proposed scheme, as skip frames accumulate, the D-TFT hysteresis progressively increases to compensate for the rising luminance component, thereby improving the flicker. By employing two voltages, VRST_C and VRST_D, the luminance amplitude component at 1 Hz reduced from 0.201 cd/m2 to 0.093 cd/m2. The luminance amplitude components were reduced to less than half not only at the frequency of 1 Hz but also for other frequencies below 6 Hz, confirming a significant improvement in flickering. Depending on the characteristics of the oxide TFTs, applying additional voltages, such as VRST_E and VRST_F, at the desired skip frame positions will greatly assist in compensating the flicker characteristics at any driving frequency, thus significantly improving the display quality.