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A 64K GaAs gate array | IEEE Conference Publication | IEEE Xplore

A 64K GaAs gate array


Abstract:

This paper will report on a gate array that employs Schottky diode capacitor-coupled logic to attain a noise margin of 400mV. At a power dissipation of 1mW%gate, the prop...Show More

Abstract:

This paper will report on a gate array that employs Schottky diode capacitor-coupled logic to attain a noise margin of 400mV. At a power dissipation of 1mW%gate, the propagation delay was 284ps.
Date of Conference: 25-27 February 1987
Date Added to IEEE Xplore: 06 January 2003
Conference Location: New York, NY, USA

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