Results 31 to 40 of about 20,316 (163)

THE METHODOLOGY OF CIRCUIT CONSTRUCTION OF THE ANALOG VALUE CONVERTER IN THE TIMEFRAME

open access: yesИзмерение, мониторинг, управление, контроль, 2023
Background. Most modern digital voltmeters use an analog-to-digital converter (ADC) of the time-pulse type with two-stage integration, which takes place in two stages – integration and counting.
Mikhail A. Vatutin   +3 more
doaj   +1 more source

IMPLEMENTATION OF AN INTEGRATING ANALOG-DIGITAL CONVERTER WITH INTERMEDIATE PULSE LATESTIMATION MODULATION

open access: yesИзвестия высших учебных заведений. Поволжский регион:Технические науки, 2020
Bachground. The technological breakthrough in the field of integrated electronics provides the production of sensor equipment with high metrological characteristics, expansion of their dynamic range of conversion, which, in turn, makes improving ...
V. N. Ashanin, A. A. Korotkov
doaj   +1 more source

A 0.5-V Fully Synthesizable SAR ADC for On-Chip Distributed Waveform Monitors

open access: yesIEEE Access, 2019
This paper presents a fully synthesizable successive-approximation-register (SAR) analog-to-digital converter (ADC) for on-chip distributed waveform monitoring in a low-power system-on-chip (SoC).
Jun-Eun Park   +2 more
doaj   +1 more source

50 YEARS OF INTEGRATING ANALOG-TO-DIGITAL CONVERTERS

open access: yesИзмерение, мониторинг, управление, контроль
Background. This article examines the fifty-year history of the theoretical development and refinement ofone of the most common classes of analog-to-digital converters, whose distinguishing feature is the use of a closed-loopstructure with integrators in
Boris V. Chuvykin, Irina A. Dolgova
doaj   +1 more source

DESIGN AND IMPLELMENTATION A PC BASED SYSTEM FOR CIRCUIT TESTING

open access: yesJournal of Engineering, 2008
This thesis deals with design and implementation of PC based control unit for testing systems. The design of the system involves mainly the hardware circuits, and software.
ZAID ALI SALMAN, SARKOUT N. ABDULLA
doaj   +1 more source

A dither‐less bit weight digital background calibration for bridge capacitor digital‐to‐analog converter successive approximation register analog‐to‐digital converters

open access: yesElectronics Letters, 2022
The authors present a dither‐less background digital bit weights calibration method for split‐capacitor digital‐to‐analog converter (CDAC) successive approximation register (SAR) analog‐to‐digital converters (ADCs) to improve non‐linearities caused by ...
Soohoon Lee, Jintae Kim
doaj   +1 more source

Digital OFDM-PON Based on Delta–Sigma Modulation Employing Binary IM-DD Channels

open access: yesIEEE Photonics Journal, 2017
In this paper, a delta–sigma modulation is proposed for the orthogonal frequency division multiplexed-passive optical network (OFDM-PON) to enable transmission of OFDM signals via binary intensity modulation and direct detection (IM-DD) channels ...
Cai Li   +5 more
doaj   +1 more source

Low-noise delta-sigma analog front end with capacitor swapping technique for capacitive microsensors

open access: yesMeasurement + Control, 2022
In this paper, low-noise incremental delta–sigma analog front end (AFE) integrated circuit (IC) for capacitive microsensors is presented. A conventional capacitance-to-digital converter (CDC) mainly uses a multi-stage capacitive sensing amplified stage ...
Kyeongsik Nam   +4 more
doaj   +1 more source

Analysis and Design of a New Voltage Amplifier Applying In The Time and Voltage Domain Converters [PDF]

open access: yesمجله مدل سازی در مهندسی, 2016
In this paper a new voltage amplifier is investigated which is employed in the time and voltage domain converters such as analog to digital converters (ADCs) and time to digital converters (TDCs).
نازنین معلمیان   +2 more
doaj   +1 more source

A 10-Bits 50-MS/s SAR ADC Based on Area-Efficient and Low-Energy Switching Scheme

open access: yesIEEE Access, 2020
This paper presents a 10-bits successive approximation register analog-to-digital converter (SAR ADC) for low-power applications. The input signals are multiplied by two because the dual sampling technique is used during the sampling phase.
Chi-Chang Lu, Ding-Ke Huang
doaj   +1 more source

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