Results 191 to 200 of about 50,418 (238)
Memristive In-Memory Object Detection with 128 Mb C-Doped Ge<sub>2</sub>Sb<sub>2</sub>Te<sub>5</sub> PCM Chip. [PDF]
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Reliability enhancement of analog-to-digital converters (ADCs)
Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002The reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an ADC to convert the collected data to digital form and a digital unit to process it. The reliability of these systems is affected by the ability of its constituent blocks to tolerate faults ...
Singh, M, Koren, I
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Domino ADC: A novel analog-to-digital converter architecture
Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010A novel analog-to-digital converter (ADC) architecture, named domino architecture, is introduced. The proposed idea can be taken as the continuous-time counterpart of SAR ADCs, and at the same time it resembles a series version of flash ADCs being implemented with much less circuit complexity and chip area.
Mohammad Takhti +2 more
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Incorporating fault tolerance in analog-to-digital converters (ADCs)
Proceedings International Symposium on Quality Electronic Design, 2003The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sensitive blocks which could then be redesigned for better reliability by incorporating fault tolerance. This paper illustrates the steps
M. Singh, I. Koren
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Transient fault sensitivity analysis of analog-to-digital converters (ADCs)
Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems, 2002Reliability of systems used in space, avionic and biomedical applications is highly critical. Such systems consist of an analog front-end to collect data, an ADC to convert the collected data to digital form and a digital unit to process it. It is important to analyze the fault sensitivities of each of these to effectively gauge and improve the ...
Singh, M, Rachala, R, Koren, I
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Serial pixel analog-to-digital converter (ADC)
SPIE Proceedings, 2010This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator.
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Dynamic Stage Element Matching (DSEM) in Pipeline Analog to Digital Converters (ADC)
2012 IEEE International Conference on IC Design & Technology, 2012In this paper, a novel compensation method, Dynamic Stage Element Matching (DSEM), is introduced. This paper provides a comparison of existing error compensation methods and DSEM. DSEM extends Dynamic Element Matching (DEM) of Digital to Analog Converters (DAC) to entire stages of a pipeline ADC.
Francis Fradette +3 more
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Application Specific Analog-to-Digital Converters (ADCs) for Communication Systems
2020To compete with the existing products, hardware manufacturers are required to develop their products with a great focus on smaller area and lower power consumption. The trade-offs between power, area, and the speed of operation play a vital role in the field of integrated circuit design.
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High performance analog-to-digital converters (ADCs) for signal processing
ICMMT 2000. 2000 2nd International Conference on Microwave and Millimeter Wave Technology Proceedings (Cat. No.00EX364), 2002Analog-to-digital converters (ADCs) are widely used for signal processing in radar, communication and electronic warfare (EW) systems, where speed and resolution are of paramount importance. Significant improvement in dynamic range and clutter rejection are dependent on critical parameters of the ADC devices used by the radar signal processors.
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2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013
Time-based ADC is an essential block in designing software radio receivers because it exhibits higher speed and lower power compared to the conventional ADC, especially, at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted to a pulse delay time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse delay
Hassan Mostafa, Yehea I. Ismail
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Time-based ADC is an essential block in designing software radio receivers because it exhibits higher speed and lower power compared to the conventional ADC, especially, at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted to a pulse delay time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse delay
Hassan Mostafa, Yehea I. Ismail
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