A Low-Power SAR ADC with Capacitor-Splitting Energy-Efficient Switching Scheme for Wearable Biosensor Applications [PDF]
A low-power SAR ADC with capacitor-splitting energy-efficient switching scheme is proposed for wearable biosensor applications. Based on capacitor-splitting, additional reference voltage Vcm, and common-mode techniques, the proposed switching scheme ...
Yunfeng Hu +7 more
doaj +2 more sources
A 10-Bit 400-KS/s Low Noise Asynchronous SAR ADC with Dual-Domain Comparator for Input-Referred Noise Reduction [PDF]
This paper presents a low noise 0.6-V 400-kS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) for input-referred noise reduction. A dual-domain comparator is proposed to optimize the power, noise, and sampling rate
Sang-Hun Lee, Won-Young Lee
doaj +2 more sources
A Hybrid Energy-Efficient, Area-Efficient, Low-Complexity Switching Scheme in SAR ADC for Biosensor Applications [PDF]
A hybrid energy-efficient, area-efficient, low-complexity switching scheme in SAR ADC for biosensor applications is proposed. This scheme is a combination of the monotonic technique, the MSB capacitor-splitting technique, and a new switching method.
Yunfeng Hu +8 more
doaj +2 more sources
A 100 KS/s 8–10-Bit Resolution-Reconfigurable SAR ADC for Biosensor Applications [PDF]
A DAC switching scheme that combines energy efficiency and resolution reconfigurability is proposed. Compared with the conventional switching scheme, the proposed scheme achieves 93.8%, 96.1%, and 97.3% switching energy saving in 8-bit, 9-bit, and 10-bit
Yunfeng Hu +5 more
doaj +2 more sources
An Energy-Efficient LiDAR Receiver Using Time-to-Voltage Converter and SAR ADC in 180 nm CMOS [PDF]
This paper proposes an energy-efficient LiDAR receiver topology based on a time-to-voltage converter (TVC) followed by a 5-bit SAR ADC. By converting the time-interval between START and STOP signals into the voltage domain, the proposed topology avoids ...
Bobin Seo, Sung-Min Park
doaj +2 more sources
A 10-Bit 300 kS/s Reference-Voltage Regulator Free SAR ADC for Wireless-Powered Implantable Medical Devices [PDF]
This paper presents a reference-voltage regulator free successive-approximation-register analog-to-digital converters (SAR ADC) with self-timed pre-charging for wireless-powered implantable medical devices. Assisted by a self-timed pre-charging technique,
Yongkui Yang +3 more
doaj +2 more sources
Two-Step Single Slope/SAR ADC with Error Correction for CMOS Image Sensor [PDF]
Conventional two-step ADC for CMOS image sensor requires full resolution noise performance in the first stage single slope ADC, leading to high power consumption and large chip area.
Fang Tang +5 more
doaj +2 more sources
A 1.2-V 7.76-ENOB 1-MS/s single-ended SAR ADC in 65-nm CMOS for biomedical applications [PDF]
A successive approximation register analog-to-digital converter (SAR ADC) is a promising approach used in biomedical applications due to its energy-efficiency architecture with less complex hardware implementation. The core building blocks of SAR ADC are
Kawther I. Arafa +4 more
doaj +2 more sources
Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems [PDF]
Kiho Seong +2 more
exaly +2 more sources
A 12-bit 80 MS/s hybrid type analog-to-digital converter (ADC) for high sampling speed and low power applications is presented in this paper. It has a subranging architecture with a front end of 6-bit Flash ADC with five channels of 6-bit time ...
Deeksha Verma +11 more
doaj +1 more source

