Results 191 to 200 of about 6,357 (228)

Analog baseband chain with analog to digital converter (ADC) of Synthetic Aperture Radar (SAR) receiver

2011 Proceedings of the ESSCIRC (ESSCIRC), 2011
An analog baseband chain together with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) receiver implemented in 130nm CMOS technology is presented in this paper. The baseband and the ADC are integrated on a single chip, occupying 1.6mm2 (I and Q branch) of active silicon area. The baseband is selectable between 50MHz and 160MHz
Faizah Abu Bakar, Tero Nieminen, Kari Halonen   +2 more
exaly   +5 more sources

Serial pixel analog-to-digital converter (ADC)

SPIE Proceedings, 2010
This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator.
openaire   +1 more source

Analytical Evaluation and Optimization of the Analog-to-Digital Converter in Software Radio Architectures

IEEE Transactions on Vehicular Technology, 2005
The software radio concept is a topic of widespread interest in wireless cellular systems. Due to the high sampling ratio and quantization requirements, the ADC (analog-to-digital converter) is as key component of any software radio architecture. In this paper we present an analytical tool for evaluating the quantization requirements within the ADC ...
Teresa Araujo, Rui Dinis 0001
openaire   +1 more source

Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs)

2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013
Time-based ADC is an essential block in designing software radio receivers because it exhibits higher speed and lower power compared to the conventional ADC, especially, at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted to a pulse delay time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse delay
Hassan Mostafa, Yehea I. Ismail
openaire   +1 more source

Application Specific Analog-to-Digital Converters (ADCs) for Communication Systems

2020
To compete with the existing products, hardware manufacturers are required to develop their products with a great focus on smaller area and lower power consumption. The trade-offs between power, area, and the speed of operation play a vital role in the field of integrated circuit design.
openaire   +1 more source

High performance analog-to-digital converters (ADCs) for signal processing

ICMMT 2000. 2000 2nd International Conference on Microwave and Millimeter Wave Technology Proceedings (Cat. No.00EX364), 2002
Analog-to-digital converters (ADCs) are widely used for signal processing in radar, communication and electronic warfare (EW) systems, where speed and resolution are of paramount importance. Significant improvement in dynamic range and clutter rejection are dependent on critical parameters of the ADC devices used by the radar signal processors.
openaire   +1 more source

Properties and Use of Digital-to-Analog (DAC) and Analog-to-Digital (ADC) Converters

1975
Most laboratory instruments either produce or accept analog or continuous signals of some form. In order for a digital computer to be able to communicate with an analog instrument, digital-analog interconversions must be made. There are several different ways to construct devices to accomplish this.
Charles L. Wilkins, Sam P. Perone, Charles E. Klopfenstein, Robert C. Williams, Donald E. Jones   +4 more
openaire   +1 more source

A Reduced Delay Method for Improving the Performance of Sigma-Delta Analog-to-Digital Converters (ADC)

Analog Integrated Circuits and Signal Processing, 2002
Excess loop delay in a continuous-time switched-current ΣΔ modulator causes a stability problem and degrades the modulator's dynamic range. This paper presents a simple and effective way to reduce the loop delay and improve the modulator's performance. The loop delay of the ADC is reduced by feeding the “predicted next state” to the comparator.
Louis Luh, John Choma, Jeffrey Draper
openaire   +1 more source

Fault Sensitivity and Tolerance of Successive Approximation and Δ-Σ Analog-to-Digital Converters (ADCs)

Analog Integrated Circuits and Signal Processing, 2003
The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sensitive blocks which could then be redesigned for better reliability by incorporating fault tolerance. This paper illustrates the steps
Mandeep Singh, Israel Koren
openaire   +1 more source

GaAs Sigma-Delta Modulator Modeling for Analog to Digital Converters (ADCS)

1992
Abstract : In this project, a sigma-delta modulator has been designed. The circuit was designed and simulated using model parameters corresponding to the Vitesse 1.2 micron GaAs MESFET technology. The clock rate of the circuit is 512- Mhz and preliminary results show that it can be used for a 9-10 bit A/D converter accepting a 4-Mhz input signal.
Ray Siford, Eric Mahurin
openaire   +1 more source