Results 41 to 50 of about 68,896 (280)
Frontiers in Neuroscience, 2015 The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits.
Xinjie Guo +8 more
semanticscholar +1 more source
Gain Error Correction for CMOS Image Sensor Using Delta-Sigma Modulation [PDF]
, 2010 A delta-sigma modulation analog-to-digital converter (ADC) has many benefits over the use of a pipeline ADC in a CMOS image sensor. This includes lower power, noise reduction, ease of maximizing the input range, and simpler signal routing for large ...
Baker, R. Jacob, Yap, Kuangming
core +2 more sources
A 0.5-V Fully Synthesizable SAR ADC for On-Chip Distributed Waveform Monitors
IEEE Access, 2019 This paper presents a fully synthesizable successive-approximation-register (SAR) analog-to-digital converter (ADC) for on-chip distributed waveform monitoring in a low-power system-on-chip (SoC).
Jun-Eun Park +2 more
doaj +1 more source
Multiplikasi Input Analog pada PLC menggunakan Multiplekser IC74HC4067
Jurnal Elkomika, 2021 ABSTRAK Kebutuhan sistem otomasi untuk pekerjaan tentu sangat dituntut untuk menjadi lebih efektif dan efisien seperti halnya pemanfaatan PLC dalam bidang industri untuk menjalankan segala aktifitas menjadi otomatis, terkadang sistem ADC (analog to ...
ASEP ANDANG +2 more
doaj +1 more source
Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK [PDF]
, 2005 This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital (A/D) and Digital-to-Analog (D/A) Converters in MATLAB®.
Delgado Restituto, Manuel +3 more
core +1 more source
A 10-bit Charge-Redistribution ADC Consuming 1.9 μW at 1 MS/s [PDF]
, 2010 This paper presents a 10 bit successive approximation ADC in 65 nm CMOS that benefits from technology scaling. It meets extremely low power requirements by using a charge-redistribution DAC that uses step-wise charging, a dynamic two-stage comparator and
Elzakker, Michiel van +5 more
core +2 more sources
A 13-Bit 100 kS/s Two-Step Single-Slope ADC for a 64 × 64 Infrared Image Sensor
EngAn Analog-to-Digital Converter (ADC) is an indispensable part of image sensor systems. This paper presents a silicon-based 13-bit 100 kS/s two-step single-slope analog-to-digital converter (TS-SS ADC) for infrared image sensors with a frame rate of 100 ...
Qiaoying Gan +5 more
doaj +1 more source
High Linearity SAR ADC for Smart Sensor Applications [PDF]
, 2018 This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor ...
Cen, Yuanjun +7 more
core +1 more source
On Full-Duplex Radios With Modulo-ADCs
IEEE Open Journal of the Communications Society, 2021 Wireless full-duplex (FD) transceivers have become more commonplace in the recent years, enabled by improvements in hardware as well as in signal processing algorithms dedicated to self-interference (SI) mitigation.
Luis G. Ordonez +4 more
doaj +1 more source
A low power and low signal 5-bit 25MS/s pipelined ADC for monolithic active pixel sensors [PDF]
, 2007 For CMOS monolithic active pixels sensor readout, we developed a 5 bit low power analog to digital converter using a pipelined architecture. A non-resetting sample and hold stage is included to amplify the signal by a factor of 4.
Bouvier, J. +7 more
core +3 more sources