Results 41 to 50 of about 50,418 (238)
A 13-Bit 100 kS/s Two-Step Single-Slope ADC for a 64 × 64 Infrared Image Sensor
An Analog-to-Digital Converter (ADC) is an indispensable part of image sensor systems. This paper presents a silicon-based 13-bit 100 kS/s two-step single-slope analog-to-digital converter (TS-SS ADC) for infrared image sensors with a frame rate of 100 ...
Qiaoying Gan +5 more
doaj +1 more source
On Full-Duplex Radios With Modulo-ADCs
Wireless full-duplex (FD) transceivers have become more commonplace in the recent years, enabled by improvements in hardware as well as in signal processing algorithms dedicated to self-interference (SI) mitigation.
Luis G. Ordonez +4 more
doaj +1 more source
High Linearity SAR ADC for Smart Sensor Applications [PDF]
This paper presents capacitive array optimization technique to improve the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) for smart sensor ...
Cen, Yuanjun +7 more
core +1 more source
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology [PDF]
This paper presents a CMOS 0.7-μm ΣΔ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential switched-capacitor circuits with a clock frequency of 35.2 MHz, and has a power consumption of ...
Medeiro Hidalgo, Fernando +2 more
core +1 more source
Simple evaluation of the nonlinearity signature of an ADC using a spectral approach [PDF]
This work presents a new method to estimate the nonlinearity characteristics of analog-to-digital converters (ADCs). The method is based on a nonnecessarily polynomial continuous and differentiable mathematical model of the converter transfer function ...
Jalón, Maria Ángeles +2 more
core +1 more source
Recent Advances in Ultrahigh-Speed Wireline Receivers With ADC-DSP-Based Equalizers
High-speed wireline data transceivers (TRX) with analog-to-digital converter (ADC) followed by digital signal processor (DSP) on the receiver (RX) equalizer became popular for applications requiring >100-Gb/s per-lane data rate over long-reach (LR)
Seoyoung Jang +4 more
doaj +1 more source
A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS
This paper presents a 12-bit 100-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) for low-power wireless and imaging systems.
Manxin Li +7 more
doaj +1 more source
Simple first order data compression processor concept [PDF]
Data-compression processing systems based on an analog-to-digital converter /ADC/, includes a qualitative comparator for comparison of the ADC output with a ramp generator, which is connected as a bidirectional binary counter with selective inputs.
Anderson, T. O.
core +1 more source
OCTAD-S: Digital Fast Fourier Transform Spectrometers by FPGA
We have developed a digital fast Fourier transform (FFT) spectrometer made of an analog-to-digital converter (ADC) and a field-programmable gate array (FPGA). The base instrument has independent ADC and FPGA modules, which allow us to implement different
Chikahiro, Yuichi +7 more
core +1 more source
Hardware for digitally controlled scanned probe microscopes [PDF]
The design and implementation of a flexible and modular digital control and data acquisition system for scanned probe microscopes (SPMs) is presented. The measured performance of the system shows it to be capable of 14-bit data acquisition at a 100-kHz ...
Baldeschwieler, J. D. +4 more
core +1 more source

