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Potential of MOS technologies for analog integrated circuits

IEEE Journal of Solid-State Circuits, 1978
Reviews the rapid progress in MOS analog circuit techniques over the past three years, and attempts to estimate the near-term attainable characteristics of MOS LSI circuits which incorporate both analog and digital functions.
D.A. Hodges, P.R. Gray, R.W. Brodersen
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Statistical modeling of device mismatch for analog MOS integrated circuits

IEEE Journal of Solid-State Circuits, 1992
A generalized parameter-level statistical model, called statistical MOS (SMOS), capable of generating statistically significant model decks from intra- and inter-die parameter statistics is described. Calculated model decks preserve the inherent correlations between model parameters while accounting for the dependence of parameter variance on device ...
C. Michael, M. Ismail
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Behavior of analog MOS integrated circuits at high temperatures

IEEE Journal of Solid-State Circuits, 1985
Thermal effects on small-signal characteristics of MOS transistors are studied and parameters of MOS amplifiers operating at high temperatures are calculated. The predicted performance has been experimentally verified and high-temperature measurements of an operational amplifier and a switched-capacitor precision amplifier are presented.
Hosticka, Bedrich   +3 more
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Design considerations in single-channel MOS analog integrated circuits-a tutorial

IEEE Journal of Solid-State Circuits, 1978
The design of single-channel MOS analog integrated circuits is discussed. Simple models are presented and approximate design equations are given for basic analog cells. The emphasis is on first-order analysis as a starting point for computer-aided design.
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Analog MOS integrated circuits-certain new ideas, trends, and obstacles

IEEE Journal of Solid-State Circuits, 1987
Possible directions for analog MOS IC research and development are discussed. Although many references to recent work are provided, no comprehensive review of the state of the art is attempted. Rather, the emphasis is selectively on certain current trends, as well as ideas that, in the opinion of the author, show promise for the future.
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Yield optimization of analog MOS integrated circuits including transistor mismatch

1993 IEEE International Symposium on Circuits and Systems, 2002
With the aid of the SMOS (statistical MOS) model, it is presently possible to simulate random device mismatch effects on the circuit performance. Two different optimization algorithms, which, together with the SMOS model, can create an efficient CAD environment for integrated circuit designers are presented.
H. Su, C. Michael, M. Ismail
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