Results 21 to 30 of about 3,564 (253)
On the Design of Logarithmic Multiplier Using Radix-4 Booth Encoding
This paper proposes an energy-efficient approximate multiplier which combines radix-4 Booth encoding and logarithmic product approximation. Additionally, a datapath pruning technique is proposed and studied to reduce the hardware complexity of the ...
Ratko Pilipovic, Patricio Bulic
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Approximate θ-multipliers on Banach algebras [PDF]
We show that each approximate θ-multiplier T: A ⟶ A on without order Banach algebra A is an exact θ-multiplier, and for every approximate θ-multiplier T there corresponds a unique θ-multiplier near to T. Moreover, each mapping S: A ⟶ A which is near to θ-
Abbas Zivari-Kazempour
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Design and Analysis of Multiplier Using Approximate 15-4 Compressor
This paper presents the design of approximate 15-4 compressor using 5-3 compressors as basic module. Four different types of approximate 5-3 compressors are used in a 15-4 compressor for less power consumption and high pass rate.
R. Marimuthu +2 more
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IoT uses wireless sensor networks (WSN) to deploy many sensors to track environmental and physical parameters. The WSN measurements are frequently contaminated and altered by noise.
Charles Rajesh Kumar J. +2 more
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AREA AND POWER EFFICIENT LEAST MEAN SQUARE ADAPTIVE FILTER USING APPROXIMATE ARITHMETIC [PDF]
The efficiency of a digital signal processing system heavily relies on the performance of multipliers, which are crucial arithmetic functional units. Approximate arithmetic techniques have emerged as a promising approach to significantly reduce circuit ...
G. R. L. V. N. S. Raju +5 more
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Approximate 8-bit multipliers and their physical design implementation
Approximate computing is widely used in a large number of error-tolerant applications. Multiplication is an integral arithmetic operation for many of these applications.
Satyajit Mondal, Marimuthu R, Ravi S
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FPGA-Based Multi-Level Approximate Multipliers for High-Performance Error-Resilient Applications
This paper presents approximate multipliers which are efficiently deployed on Field Programmable Gate Arrays (FPGAs) by using newly proposed approximate logic compressors at different levels of accuracy.
Nguyen Van Toan, Jeong-Gun Lee
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Approximate Multiplier Design Using Novel Dual-Stage 4:2 Compressors
High speed multimedia applications have paved way for a whole new area in high speed error-tolerant circuits with approximate computing. These applications deliver high performance at the cost of reduction in accuracy.
Pranose J. Edavoor +2 more
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Approximation of Fourier Integral Operators by Gabor Multipliers [PDF]
22 ...
Elena Cordero +2 more
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Power and area efficient FIR filter architecture in digital encephalography systems
In the process of Electroencephalogram (EEG) acquisition, the electrical signals from the brain are contaminated by numerous noise sources and artifacts.
Sudhanshu Janwadkar, Rasika Dhavse
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