Results 271 to 280 of about 3,307,992 (302)
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IEEE PES T&D 2010, 2010
The area control error (ACE) determines how much a balancing authority (BA) needs to move its regulating units to meet mandatory control performance standard requirements. Regulation is an expensive resource that could cost several hundred million dollars a year for a BA.
null Ning Zhou +4 more
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The area control error (ACE) determines how much a balancing authority (BA) needs to move its regulating units to meet mandatory control performance standard requirements. Regulation is an expensive resource that could cost several hundred million dollars a year for a BA.
null Ning Zhou +4 more
openaire +1 more source
Electric Machines & Power Systems, 1990
The paper presents an analysis of the automatic generation control based on a new area control error strategy for an interconnected hydrothermal system in the discrete-mode considering generation rate constraints (GRCs). The investigations reveal that the system dynamic performances following a step load perturbation in either of the areas with ...
D. Das +3 more
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The paper presents an analysis of the automatic generation control based on a new area control error strategy for an interconnected hydrothermal system in the discrete-mode considering generation rate constraints (GRCs). The investigations reveal that the system dynamic performances following a step load perturbation in either of the areas with ...
D. Das +3 more
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Quality of service support in wireless local area network with error control protocol
2008 33rd IEEE Conference on Local Computer Networks (LCN), 2008In this paper, we applied an error control protocol for wireless local area network in medium access control. Hiperlan\2 random access phase is taken as an example. We applied quality of service support in the random access phase. Analytical model is developed for the backoff strategy with error control protocol. The performance metrics are shown.
Abdelsalam B. Amer +2 more
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A fault-tolerant ICAP controller with a selective-area soft error mitigation engine
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2017Dynamic partial reconfiguration (DPR) allows runtime access to the configuration memory (CMEM) of FPGAs. A key function that relies on DPR is task reconfiguration, where circuits are multiplexed in time and space in order to reduce device count and cost. Moreover, in mission-critical applications, DPR is used for soft error mitigation (SEM).
Adewale Adetomi +2 more
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Hybrid ARQ Error-Controlling Scheme for Robust and Efficient Transmission of UWB Body Area Networks
IEICE Transactions on Communications, 2010This paper presents hybrid type-II automatic repeat request (H-ARQ) for wireless wearable body area networks (BANs) based on ultra wideband (UWB) technology. The proposed model is based on three schemes, namely, high rate optimized rate compatible punctured convolutional codes (HRO-RCPC), Reed Solomon (RS) invertible codes and their concatenation ...
Haruka SUZUKI +2 more
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A new error control scheme for packetized voice over high-speed local area networks
1993 18th Conference on Local Computer Networks, 2002A new, unified approach towards the delay and error constraints that influence the quality of a digitized voice over asynchronous local computer networks is proposed. This approach, called Slack automatic repeat request (ARQ) (S-ARQ), proposes an extension of the control time mechanism for jitter control in order to provide error recovery through ...
B.J. Dempsey, J. Liebeherr, A.C. Weaver
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Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
A new Error Correcting Code (ECC) solution aiming to improve the reliability of NAND flash memory (NAND) is proposed. Implemented in Solid-State Drive (SSD) controller IC (Fabricated in TSMC65LP), it is confirmed that more than 1/10000 lower error rate without increasing redundant bits (parity) of conventional BCH code, and 1.7x longer endurance of SSD
Kai Li, Mitsuyoshi Ito, Atsushi Esumi
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A new Error Correcting Code (ECC) solution aiming to improve the reliability of NAND flash memory (NAND) is proposed. Implemented in Solid-State Drive (SSD) controller IC (Fabricated in TSMC65LP), it is confirmed that more than 1/10000 lower error rate without increasing redundant bits (parity) of conventional BCH code, and 1.7x longer endurance of SSD
Kai Li, Mitsuyoshi Ito, Atsushi Esumi
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ANovel SCUC Model Considering Area Control Errors and Resulting Penalties
2023 IEEE 7th Conference on Energy Internet and Energy System Integration (EI2), 2023Yuancheng Miao +6 more
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LQI-Type Load-Frequency Control Using Accumulative Quantities of Area Control Error
IEEJ Transactions on Power and Energy, 1985Katsumi Yamashita, Tsuneo Taniguchi
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Area Control Error Forecasting using Deep learning for an Interconnected Power System
2022 IEEE Power and Energy Conference at Illinois (PECI), 2022Hussein Abdeltawab, Amr Radwan
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