Results 21 to 30 of about 1,338 (209)
Libshalom: Optimizing Small and Irregular-Shaped Matrix Multiplications on ARMv8 Multi-Cores
International Conference for High Performance Computing, Networking, Storage and Analysis, 2021 General Matrix Multiplication (GEMM) is a key subroutine in highperformance computing. While the mainstream linear algebra libraries can deliver high performance on large and regular-shaped GEMM, they are inadequate for optimizing small and irregular ...
Wei-Ling Yang +4 more
semanticscholar +2 more sources
wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems [PDF]
Journal of Computational Science and Technology, 2023 Cache performance is a critical design constraint for modern many-core systems. Since the cache often works in a “black-box” manner, it is difficult for the software to reason about the cache behavior to match the running software to the underlying ...
Wan-Rong Gao +4 more
semanticscholar +2 more sources
An Evaluation of Decoupled Access Execute on ARMv8
, 2017 Energy saving techniques on the hardware level are not always capable of adapting to the applications. Thus energy saving techniques at software level are needed to overcome the limitations of the hardware.
Petrousis, Georgios
core +4 more sources
RootBot: High-throughput root stress phenotyping robot. [PDF]
Appl Plant Sci, 2023 Abstract Premise Higher temperatures across the globe are causing an increase in the frequency and severity of droughts. In agricultural crops, this results in reduced yields, financial losses, and increased food costs at the supermarket. Root growth maintenance in drying soils plays a major role in a plant's ability to survive and perform under ...
Ruppel M +8 more
europepmc +2 more sources
Parallel Implementations of ARIA on ARM Processors and Graphics Processing Unit
Applied Sciences, 2022 The ARIA block cipher algorithm is Korean standard, IETF standard (RFC 5794), and part of the TLS/SSL protocol. In this paper, we present the parallel implementation of ARIA block cipher on ARMv8 processors and GPU.
Siwoo Eum +5 more
doaj +1 more source
Multiprecision Multiplication on ARMv8 [PDF]
2017 IEEE 24th Symposium on Computer Arithmetic (ARITH), 2017 Multiplication of large integers is a fundamental operation for public key cryptography. In contemporary public key cryptography, the sizes of integers are typically from more than one hundred bits to even several thousands of bits. Because these sizes exceed the bit widths of all general-purpose processors, these multiplications must be performed with
LIU, Zhe +3 more
openaire +4 more sources
Taming an Authoritative Armv8 ISA Specification: L3 Validation and CakeML Compiler Verification [PDF]
, 2022 Machine-readable specifications for the Armv8 instruction set architecture have become publicly available as part of Arm’s release processes, providing an official and unambiguous source of truth for the semantics of Arm instructions.
Fox, Anthony C. J., +6 more
core +1 more source
Concurrency and Computation: Practice and Experience, Volume 35, Issue 25, 15 November 2023., 2023 Summary Asymmetric multicore processors (AMPs) couple high‐performance big cores and power‐efficient small ones, all exposing a shared instruction set architecture to software, but with different microarchitectural features. The energy efficiency benefits of AMPs, together with the general‐purpose nature of the various cores, have led hardware ...
Carlos Bilbao +2 more
wiley +1 more source
Characterization of data compression across CPU platforms and accelerators
Concurrency and Computation: Practice and Experience, Volume 35, Issue 20, 10 September 2023., 2023 Abstract The ever increasing amount of generated data makes it more and more beneficial to utilize compression to trade computations for data movement and reduced storage requirements. Lately, dedicated accelerators have been introduced to offload compression tasks from the main processor.
Laura Promberger +2 more
wiley +1 more source
Concurrency and Computation: Practice and Experience, Volume 35, Issue 20, 10 September 2023., 2023 Summary Novel architectures leveraging long and variable vector lengths like the NEC SX‐Aurora or the vector extension of RISCV are appearing as promising solutions on the supercomputing market. These architectures often require re‐coding of scientific kernels.
Pablo Vizcaino +3 more
wiley +1 more source