Results 141 to 150 of about 76,307 (189)
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2023A method is proposed for decreasing the area of the ASIC occupied by the scheme of a combined automaton. The method is based on encoding of the classes of pseudoequivalent states of Moore automaton by additional variables. This approach leads to a four-level scheme implemented as two nano-PLAs and decreases the area of nano-PLA generating ...
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Proceedings of IEEE International Test Conference - (ITC), 2002
A novel method for automating the installation of CBIST and moving test development forward in the design cycle is shown, including a practical method for determining CBIST pathology. Three ASICS have been developed with this method. Design and prototype results are given. >
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A novel method for automating the installation of CBIST and moving test development forward in the design cycle is shown, including a practical method for determining CBIST pathology. Three ASICS have been developed with this method. Design and prototype results are given. >
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Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's, 2002
Testing ASICs 'at-speed' attempts to improve the test quality by detecting delay-faults. In this paper a methodology to generate at-speed test vectors is described. It is based on the comparison of simulation traces obtained within different timing conditions. The methodology has been automated and successfully used. >
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Testing ASICs 'at-speed' attempts to improve the test quality by detecting delay-faults. In this paper a methodology to generate at-speed test vectors is described. It is based on the comparison of simulation traces obtained within different timing conditions. The methodology has been automated and successfully used. >
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New Electronics, 2020
Has the world got the taste again for ASICs? Socionext discusses the advantages associated with this technology
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Has the world got the taste again for ASICs? Socionext discusses the advantages associated with this technology
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Manufacturing Engineer, 1996
Uptake of application specific integrated circuit technology in the UK continues to lag behind that of its leading competitor nations. The author looks at the reasons for this slow uptake and proposes a model for technology transfer designed to increase the level of adoption.
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Uptake of application specific integrated circuit technology in the UK continues to lag behind that of its leading competitor nations. The author looks at the reasons for this slow uptake and proposes a model for technology transfer designed to increase the level of adoption.
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2016 IEEE Symposium on Security and Privacy (SP), 2016
Riad S. Wahby +4 more
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Riad S. Wahby +4 more
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???????????? ???????????????????????? ???????????????? ?? ???????????? ASIC
2020???????? ????????????. ????????????????, ???? ???????????????????? ?????????????? ?????????? ???????????????? ???????????????? ???????????????? ?????????????????????? ?????????? ??????????. ?????? ?????????? ???????????? ???????????? ?????????????????? ?????? ?????????????????????? ?????????????????? ???????????????? ?? ?????????????????????????????? ??
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CIRP Annals, 1989
The 1950 decade saw the start of a major increase in the use of electronics, and subsequently computers, in the control of machines of a major and increase in particular of production machinery. This concept of an inter-disciplinary approach to machine technology has been termed Mechatronics .
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The 1950 decade saw the start of a major increase in the use of electronics, and subsequently computers, in the control of machines of a major and increase in particular of production machinery. This concept of an inter-disciplinary approach to machine technology has been termed Mechatronics .
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Proceedings of the 17th symposium on Integrated circuits and system design, 2004
ASIC design starts have declined lately and many voices speak of fundamental changes as a result of increasing design costs, predicting even the extinction of ASIC design altogether. ASICs and ASSPs have been a formidable economic force, accounting for over one third of the semiconductor market.
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ASIC design starts have declined lately and many voices speak of fundamental changes as a result of increasing design costs, predicting even the extinction of ASIC design altogether. ASICs and ASSPs have been a formidable economic force, accounting for over one third of the semiconductor market.
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Evaluation of the PETsys TOFPET2 ASIC in multi-channel coincidence experiments
EJNMMI Physics, 2021Vanessa Nadig +2 more
exaly