Results 11 to 20 of about 597 (176)
Faster Positional‐Population Counts for AVX2, AVX‐512, and ASIMD [PDF]
Concurrency Computation Practice and ExperienceABSTRACT The positional population count operation pospopcnt counts for an array of ‐bit words how often each of the bits was set. Various applications in bioinformatics, database engineering, and digital processing exist.
Daniel Lemire
exaly +5 more sources
NTT Multiplication for NTT-unfriendly Rings
Transactions on Cryptographic Hardware and Embedded Systems, 2021 In this paper, we show how multiplication for polynomial rings used in the NIST PQC finalists Saber and NTRU can be efficiently implemented using the Number-theoretic transform (NTT).
Chi-Ming Marvin Chung +5 more
doaj +3 more sources
String searching with mismatches using AVX2 and AVX-512 instructions
Information Processing Letters, 2023 zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Tamanna Chhabra +2 more
openaire +4 more sources
Faster Base64 Encoding and Decoding Using AVX2 Instructions [PDF]
ACM Transactions on the Web, 2018 Web developers use base64 formats to include images, fonts, sounds, and other resources directly inside HTML, JavaScript, JSON, and XML files. We estimate that billions of base64 messages are decoded every day. We are motivated to improve the efficiency of base64 encoding and decoding.
Muła, Wojciech, Lemire, Daniel
openaire +4 more sources
Parallel Implementation of SM2 Elliptic Curve Cryptography on Intel Processors with AVX2 [PDF]
, 2020 This paper presents an efficient and secure implementation of SM2, the Chinese elliptic curve cryptography standard that has been adopted by the International Organization of Standardization (ISO) as ISO/IEC 14888-3:2018. Our SM2 implementation uses Intel’s Advanced Vector Extensions version 2.0 (AVX2), a family of three-operand SIMD instructions ...
Junhao Huang 0001 +3 more
openaire +2 more sources
Vectorized Falcon-Sign Implementations using SSE2, AVX2, AVX-512F, NEON, and RVV
Transactions on Cryptographic Hardware and Embedded SystemsFalcon, a NTRU-based digital signature algorithm, has been selected by NIST as one of the post-quantum cryptography (PQC) standards. Compared to verification, the signature generation of Falcon is relatively slow. One of the core operations in signature
Jipeng Zhang, Jiaheng Zhang
doaj +2 more sources
Implementation of hyyrö’s bit-vector algorithm using advanced vector extensions 2
IJAIN (International Journal of Advances in Intelligent Informatics), 2019 The Advanced Vector Extensions 2 (AVX2) instruction set architecture was introduced by Intel’s Haswell microarchitecture that features improved processing power, wider vector registers, and a rich instruction set. This study presents an implementation of
Kyle Matthew Chan Chua +3 more
doaj +2 more sources
Using AVX2 Instruction Set to Increase Performance of High Performance Computing Code
Computing and Informatics, 2017 In this paper we discuss new Intel instruction extensions - Intel Advance Vector Extensions 2 (AVX2) and what these bring to high performance computing (HPC). To illustrate this new systems utilizing AVX2 are evaluated to demonstrate how to effectively exploit AVX2 for HPC types of the code and expose the situation when AVX2 might not be the most ...
Gepner, Pawel
openaire +4 more sources
Parallel Implementation of PIPO and Its Application for Format Preserving Encryption
IEEE Access, 2022 The PIPO block cipher, a domestic lightweight block cipher, was announced at ICISC’20. In particular, the bitslicing technique is implemented in the S-Layer for the PIPO block cipher.
Hyunji Kim +5 more
doaj +1 more source
Faster Population Counts Using AVX2 Instructions [PDF]
The Computer Journal, 2017 Software is at https://github.com/CountOnes ...
Muła, Wojciech +2 more
openaire +3 more sources