Results 231 to 240 of about 36,340 (282)

Real-Time EEG Decoding of Motor Imagery via Nonlinear Dimensionality Reduction (Manifold Learning) and Shallow Classifiers. [PDF]

Biosensors (Basel)
Kucukselbes H, Sayilgan E.
europepmc   +1 more source

Targeting the Spliceosomal Protein USP39 Through Allosteric Ligands and PROTAC-Induced Degradation. [PDF]

Angew Chem Int Ed Engl
Schäfer D, Prieto-Garcia C, Wang J, Heinz M, Matkovic V, Kielkowski P, Hasselbeck S, Shah VJ, Knapp S, Hummer G, Dikic I, Cheng X.   +11 more
europepmc   +1 more source

Laser Processing of Ti Contacts for Ohmic Behavior on P‑Type 4H-SiC. [PDF]

ACS Appl Electron Mater
Vabres R, Bellocchi G, Bongiorno C, Vivona M, Roccaforte F, Badalà P, Mancuso P, Puglisi V, Rascunà S, Crupi I.   +9 more
europepmc   +1 more source

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CONSTRUCTION OF BALANCED TERNARY DESIGNS

Australian Journal of Statistics, 1986
SummaryIn this paper variance balanced ternary designs are constructed in unequal block sizes for situations when suitable BIB designs do not exist for a given number of treatments because of the constraints bk=vr,and λ(v ‐ 1) =r(k‐ 1).
Agarwal, G. G., Kumar, Sanjay
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Memristor-based balanced ternary adder

2013 25th International Conference on Microelectronics (ICM), 2013
This paper introduces a memristor based ternary adder, which is an essential building block for any arithmetic ternary operations. The proposed ternary adder circuit tries to achieve the theoretical advantages of the ternary system, increase the density and decrease the processing time by using the memristor properties such as its hysteresis and ...
A. A. El-Slehdar, A. H. Fouad, A. G. Radwan   +2 more
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On the Construction of Balanced and Partially Balanced Ternary Design

Biometrical Journal, 1979
AbstractA method of constructing balanced and partially balanced ternary designs from balanced and partially balanced incomplete block designs, respectively, and two methods of constructing partially balanced ternary designs from association schemes are obtained.
Sinha, Kishore, Saha, G. M.
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Reconfigurable Blocks Based on Balanced Ternary

Journal of Signal Processing Systems, 2010
Silicon-on-Insulator CMOS fabrication technologies are now available that offer a number of unique advantages including the availability of multiple simultaneous transistor thresholds. This paper proposes and analyzes a number of circuits for a reconfigurable array organization based on a balanced ternary logic system in which the logic set {??1, 0 ...
Paul Beckett, Tayab Memon
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Some Constructions of Partially Balanced Ternary Design^*

Calcutta Statistical Association Bulletin, 1990
This paper gives some constructions of Partially Balanced Ternary (PBT) designs, starting from a given linked block design.
Bhagwandas, Meitei, Singh, K. K.
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Synthesis of Balanced Ternary Reversible Logic Circuit

2013 IEEE 43rd International Symposium on Multiple-Valued Logic, 2013
Ternary logic synthesis has a significant role to realize multi-input ternary logic functions. Balanced ternary logic that contains three states as -1, 0 and 1 has substantial advantage over standard ternary logic containing the logic states as 0, 1 and 2.
B. Mondal, P. Sarkar, P. K. Saha, S. Chakraborty   +3 more
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