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Distributed hardwired barrier synchronization for scalable multiprocessor clusters
IEEE Transactions on Parallel and Distributed Systems, 1995Conventional multiprocessors mostly use centralized, memory-based barriers to synchronize concurrent processes created in multiple processors. These centralized barriers often become the bottleneck or hot spots in the shared memory. In this paper, we overcome the difficulty by presenting a distributed and hardwired barrier architecture, that is ...
Shisheng Shang, Kai Hwang 0001
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Fast barrier synchronization on shared fast Ethernet
1998Shared LAN is presently the most widespread networking technology, due to its extremely low cost and favourable cost/performance ratio. Clusters of Personal Computers (PCs) leveraging shared 100base-T Ethernet may currently offer the best price/performance in parallel processing.
Giovanni Chiola, Giuseppe Ciaccio
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A fine-grain parallel architecture based on barrier synchronization
Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing, 2002Although barrier synchronization has long been considered a useful construct for parallel programming, it has generally been either layered on top of a communication system or used as a completely independent mechanism. Instead, we propose that all communication be made a side-effect of barrier synchronization.
Henry G. Dietz +2 more
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Barrier Synchronization vs. Voltage Noise: A Quantitative Analysis
2019 IEEE International Symposium on Workload Characterization (IISWC), 2019Synchronization is the key to guaranteeing correct execution of parallel programs at any scale. Barriers represent heavily used synchronization primitives which prevent parallel tasks from proceeding to subsequent stages of computation before all tasks are done with previous stages.
Zamshed I. Chowdhury +5 more
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Improving GPU Memory Performancewith Artificial Barrier Synchronization
IEEE Transactions on Parallel and Distributed Systems, 2014Barrier synchronization, an essential mechanism for a block of threads to guard data consistency, is regarded as a threat to performance. This study, however, provides a different viewpoint for barrier synchronization on GPUs: adding barrier synchronization, even when functionally unnecessary, can improve the performance of some memory-intensive ...
Shih-Hsiang Lo +4 more
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Compiler optimizations for eliminating barrier synchronization
ACM SIGPLAN Notices, 1995This paper presents novel compiler optimizations for reducing synchronization overhead in compiler-parallelized scientific codes. A hybrid programming model is employed to combine the flexibility of the fork-join model with the precision and power of the single-program, multiple data (SPMD) model.
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Hardware Barrier Synchronization: Static Barrier MIMD (SBM).
1990In this paper, we give the design, and performance analysis, of a new, highly efficient, synchronization mechanism called “Static Barrier MIMD” or “SBM.” Unlike traditional barrier synchronization, the proposed barriers are designed to facilitate the use of static (compile-time) code scheduling for eliminating some synchronizations.
O'Keefe, Matthew T., Dietz, Henry G.
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Unifying Barrier and Point-to-Point Synchronization in OpenMP with Phasers
2011OpenMP is a widely used standard for parallel programing on a broad range of SMP systems. In the OpenMP programming model, synchronization points are specified by implicit or explicit barrier operations. However, certain classes of computations such as stencil algorithms need to specify synchronization only among particular tasks/threads so as to ...
Jun Shirako, Kamal Sharma, Vivek Sarkar
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Evaluation Of Flux-barriers For Synchronous Reluctance Motors
2023 12th International Conference on Control, Automation and Information Sciences (ICCAIS), 2023Dinh Hai Linh +3 more
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Using early phase termination to eliminate load imbalances at barrier synchronization points
ACM SIGPLAN Notices, 2007Martin C Rinard, Rinardmartin C
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