Results 11 to 20 of about 349,669 (308)
Named data network dynamic cache placement strategy based on programmable data plane
IET Networks, 2023 Aiming at the efficiency and implementation of in‐network cache in Named Data Network, an in‐network cache method based on the programmable data plane was proposed.
Saifeng Hou, Yuxiang Hu, Le Tian
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CCALK: (When) CVA6 Cache Associativity Leaks the Key
Journal of Low Power Electronics and Applications, 2022 In this work, we study an end-to-end implementation of a Prime + Probe covert channel on the CVA6 RISC-V processor implemented on a FPGA target and running a Linux OS.
Valentin Martinoli +3 more
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Temporal radiance caching [PDF]
ACM SIGGRAPH 2006 Sketches on - SIGGRAPH '06, 2006 We present a novel method for fast, high quality computation of glossy global illumination in animated environments. Building on the irradiance caching and radiance caching algorithms, our method leverages temporal coherence by sparse temporal sampling and interpolation of the indirect lighting. In our approach, part of the global illumination solution
Gautron, Pascal +2 more
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Data Cache-Energy and Throughput Models: Design Exploration for Embedded Processors [PDF]
, 2009 Most modern 16-bit and 32-bit embedded processors contain cache memories to further increase instruction throughput of the device. Embedded processors that contain cache memories open an opportunity for the low-power research community to model the ...
McDonald-Maier, Klaus +1 more
core +3 more sources
Coded Caching With Private Demands and Caches
IEEE Transactions on Information Theory, 2022 Recently it was shown that the seminal Maddah-Ali and Niesen (MAN) coded caching scheme leaks the demand information of each user to the others. Many works have considered coded caching with demand privacy, while each non-trivial existing coded caching scheme with private demands was built on the fact that the cache information of each user is private ...
Ali Gholami +4 more
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Variable-based multi-module data caches for clustered VLIW processors [PDF]
, 2005 Memory structures consume an important fraction of the total processor energy. One solution to reduce the energy consumed by cache memories consists of reducing their supply voltage and/or increase their threshold voltage at an expense in access time. We
Abella Ferrer, Jaume +4 more
core +1 more source
Decentralized coded caching with distinct cache capacities [PDF]
2016 50th Asilomar Conference on Signals, Systems and Computers, 2016 To be presented in ASILOMAR conference ...
M. Mohammadi Amiri, Q. Yang, D. Gunduz
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Joint Cache Partition and Job Assignment on Multi-Core Processors [PDF]
, 2012 Multicore shared cache processors pose a challenge for designers of embedded systems who try to achieve minimal and predictable execution time of workloads consisting of several jobs.
D.S. Hochbaum +3 more
core +1 more source
Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error
Journal of Low Power Electronics and Applications, 2014 We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems ...
Meilin Zhang, Paul Ampadu
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IOb-Cache: A High-Performance Configurable Open-Source Cache
Algorithms, 2021 Open-source processors are increasingly being adopted by the industry, which requires all sorts of open-source implementations of peripherals and other system-on-chip modules.
João V. Roque +3 more
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