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Cache Line Aware Algorithm Design for Cache-Coherent Architectures
IEEE Transactions on Parallel and Distributed Systems, 2016The increase in the number of cores per processor and the complexity of memory hierarchies make cache coherence key for programmability of current shared memory systems. However, ignoring its detailed architectural characteristics can harm performance significantly.
Sabela Ramos, Torsten Hoefler
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Cache vulnerability mitigation using an adaptive cache coherence protocol
The Journal of Supercomputing, 2014This paper proposes an adaptive cache coherence protocol to improve the reliability of caches against soft errors in shared-memory multi-core processors. The proposed protocol is conducted based-on a comprehensive study and analysis intended to determine the effects of cache coherence protocols on the characteristics of cache memories.
Mohammad Maghsoudloo, Hamid R. Zarandi
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Deriving efficient cache coherence protocols through refinement
Formal Methods in System Design, 1998zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Nalumasu, Ratan, Gopalakrishnan, Ganesh
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Cache coherence tradeoffs in shared-memory MPSoCs
ACM Transactions on Embedded Computing Systems, 2006Shared memory is a common interprocessor communication paradigm for single-chip multiprocessor platforms. Snoop-based cache coherence is a very successful technique that provides a clean shared-memory programming abstraction in general-purpose chip multiprocessors, but there is no consensus on its usage in resource-constrained multiprocessor systems on
M. Loghi, M. Poncino, BENINI, LUCA
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The SCI Cache Coherence Protocol
1992This article discusses the current status of the Scalable Coherent Interface (SCI), IEEE standards project P1596. The SCI cache coherence protocol is scalable (up to 64K processors can be supported), efficient (memory is not involved in the common pairwise-sharing updates), and robust (data can be reliably recovered by software after transmission ...
Stein Gjessing +4 more
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Self-adaptive WWW cache coherence protocol (SATTL)
2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099), 2002Proxy caches are widely used in wide-area network environment (Internet) to improve the performance of client-server architectures. However, the use of caches also introduces a coherence problem. To maintain coherence, World Wide Web (WWW) caches use coherence protocols, which can either be proxy or server oriented.
Srbljić, Siniša +2 more
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Proceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, 2022
Chen Ding, Benjamin Reber, Dorin Patru
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Chen Ding, Benjamin Reber, Dorin Patru
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Highly Concurrent Cache Coherence Protocols
1990We describe a family of cache coherence protocols for MIN-based multiprocessors. These protocols, called delta - cache protocols. are more highly concurrent than other directory protocols. They allow more operations to be pipelined. support multiple readers and writers to the same cache block.
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Optical coherence tomography in coronary atherosclerosis assessment and intervention
Nature Reviews Cardiology, 2022Makoto Araki, Shiro Uemura, Jung-Sun Kim
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