Results 141 to 150 of about 20,903 (180)

APP: adaptively protective policy against cache thrashing and pollution

The 21st IEEE International Workshop on Local and Metropolitan Area Networks, 2015
Least Recently Used (LRU) is the most commonly used cache replacement policy; however, it suffers from two problems: i) cache thrashing, i.e., repeated references cause continuous page evictions due to a larger size of the working set than that of the cache, and ii) cache pollution, i.e., high reuse content gets evicted by items with low or no reuse ...
Saeid Montazeri Shahtouri, Richard T. B. Ma   +1 more
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Is your caching resolver polluting the internet?

Proceedings of the ACM SIGCOMM workshop on Network troubleshooting research, theory and operations practice meet malfunctioning reality - NetT '04, 2004
Previous research has shown that most of the DNS queries reaching the root of the hierarchy are bogus [1]. This behavior derives from two constraints on the system: (1) queries that cannot be satisfied locally percolate up to the root of the DNS; (2) some caching nameservers are behind packet filters or firewalls that allow outgoing queries but block ...
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CoMon++: Preventing Cache Pollution in NDN Efficiently and Effectively

2017 IEEE 42nd Conference on Local Computer Networks (LCN), 2017
Defending against cache pollution attacks, highly detrimental attacks that are easy to implement in Named-Data Networking (NDN), currently suffers from the lack of coordination. Solving cache pollution attacks is a prerequisite for the deployment of NDN, which is widely considered to be the basis for the future Internet. We present CoMon++ to this end,
Hani Salah, Mohammed Alfatafta, Saed SayedAhmed, Thorsten Strufe   +3 more
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Cache Pollution Prevention Mechanism Based on Deep Reinforcement Learning in NDN

Journal of Communications and Information Networks, 2021
As a representative architecture of content- centric paradigms for the future Internet, named data networking (NDN) enables consumers to retrieve content duplicates from either the original server or intermediate routers. Each node of NDN is equipped with cache that buffers but not validates the data, making it vulnerable to various attacks.
Jie Zhou, Jiangtao Luo, Junxia Wang, Lianglang Deng   +3 more
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Reducing Last Level Cache Pollution in NUMA Multicore Systems for Improving Cache Performance

2012
Non-uniform memory architecture (NUMA) system has numerous nodes with shared last level cache (LLC). Their shared LLC has brought many benefits in the cache utilization. However, LLC can be seriously polluted by tasks that cause huge I/O traffic for a long time since inclusive cache architecture of LLC replaces valid cache line by back-invalidate. Many
Deukhyeon An, Jeehong Kim, JungHyun Han, Young Ik Eom   +3 more
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Reducing Cache Pollution of Threaded Prefetching by Controlling Prefetch Distance

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
Threaded prefetching based on Chip Multiprocessor (CMP) issues memory requests for data needed later by the main computation, and therefore may lead to increased stress on limited shared cache space and bus bandwidth. In our earlier work, we had proposed an effective threaded prefetching technique that selects proper prefetch distance for specific ...
Yan Huang, Zhi-min Gu, Jie Tang, Min Cai, Jianxun Zhang, Ninghan Zheng   +5 more
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Mitigating the cache data pollution by using branch path tracking

Proceedings of 2012 2nd International Conference on Computer Science and Network Technology, 2012
“Memory Wall” is one of the most important problems which must be solved for designing high performance processors. Efficient and intelligent cache system is key component of processor's memory system. We notice that cache pollution caused by the speculative execution of memory accessing instructions in predictive path may affect the cache and ...
Liu Song-He, Song Huan-Sheng, Qi Shu-Min, Zhang Jun   +3 more
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A hardware-based cache pollution filtering mechanism for aggressive prefetches

2003 International Conference on Parallel Processing, 2003. Proceedings., 2003
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between processors and memory subsystems. As smaller L1 caches prevail in deep submicron processor designs in order to maintain short cache access cycles, cache pollution caused by ...
X. Zhuang, H.-H.S. Lee
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The performance of pollution control victim cache for embedded systems

Proceedings of the 21st annual symposium on Integrated circuits and system design, 2008
In this paper we explore the design space of data caches looking for the combinations of design parameters that produce the best results at the smallest sizes. We introduce a technique named Pollution Control Victim Cache (PCVC) which improves the Pollution Control Cache (PCC), is simpler and performs better.
Giancarlo C. Heck, Roberto A. Hexsel
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W-Order Scan: Minimizing Cache Pollution by Application Software Level Cache Management for MMDB

2011
The utilization of shared LLC(Last Level Cache) is important for efficiency of multi-core processor. Uncontrolled sharing leads to cache pollution i.e. the weak locality data(single-usage data without re-using) continuously evict the strong locality data (frequently re-used data) from LLC in both inner query processing and co-running programs.
Yansong Zhang, Min Jiao, Zhanwei Wang, Shan Wang, Xuan Zhou   +4 more
openaire   +1 more source