Results 271 to 280 of about 163,537 (317)
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Generalised CMOS---a technology independent CMOS IC design style
Proceedings of the 22nd ACM/IEEE conference on Design automation - DAC '85, 1985A CMOS IC design methodology is presented which allows a single design representation, captured at the symbolic level, to be implemented in different classes of CMOS fabrication technologies such as N-well, P-well, twin-well, and SOI. Extensive use is made of CAD tools to achieve automatic conversion from the technology-independent representation into ...
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2006 IEEE International Symposium on Circuits and Systems, 2006
This paper presents the synthesis, analysis and basic operation of a new VLSI-compatible CMOS current-mode synaptic circuit which implements the basic kinetics of a general chemical synapse in log-domain.
E. Lazaridis +2 more
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This paper presents the synthesis, analysis and basic operation of a new VLSI-compatible CMOS current-mode synaptic circuit which implements the basic kinetics of a general chemical synapse in log-domain.
E. Lazaridis +2 more
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IBM Journal of Research and Development, 2000
The performance of integrated circuits has been improving exponentially for more than thirty years. During the next decade, the industry must overcome several technological challenges to sustain this remarkable pace of improvement. Challenges in lithography, transistor scaling, interconnections, circuit families, computer memory, and circuit design are
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The performance of integrated circuits has been improving exponentially for more than thirty years. During the next decade, the industry must overcome several technological challenges to sustain this remarkable pace of improvement. Challenges in lithography, transistor scaling, interconnections, circuit families, computer memory, and circuit design are
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2018 IEEE Custom Integrated Circuits Conference (CICC), 2018
Recent advances of devices and circuits have made CMOS (Complementary Metal Oxide Semiconductor) integrated circuits technology an alternative for realizing capable and affordable THz systems. Coherent detection up to 410 GHz and incoherent detection up to 10 THz as well as an almost fully integrated receiver working from 225–280 GHz have been ...
Qian Zhong +29 more
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Recent advances of devices and circuits have made CMOS (Complementary Metal Oxide Semiconductor) integrated circuits technology an alternative for realizing capable and affordable THz systems. Coherent detection up to 410 GHz and incoherent detection up to 10 THz as well as an almost fully integrated receiver working from 225–280 GHz have been ...
Qian Zhong +29 more
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2009 IEEE Custom Integrated Circuits Conference, 2009
This session of exclusively invited papers covers a selection of wafer-level technology developments key to extending nanoscale CMOS. Specific topics are progress and outlook of lithography, copper interconnects, SOI-CMOS device architectures, and high-mobility channel CMOS technologies.
Takamaro Kikkawa, Jordan Lai
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This session of exclusively invited papers covers a selection of wafer-level technology developments key to extending nanoscale CMOS. Specific topics are progress and outlook of lithography, copper interconnects, SOI-CMOS device architectures, and high-mobility channel CMOS technologies.
Takamaro Kikkawa, Jordan Lai
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Proceedings of the IEEE, 1986
A cross-coupled, ratioed quad cell was described by Nedungad, and Viswanathan [1]. One useful property of the quad is that it enables a linear large-signal transconductance cell. The other property that can be exploited is that it gives an output current proportional to the square of a differential input signal.
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A cross-coupled, ratioed quad cell was described by Nedungad, and Viswanathan [1]. One useful property of the quad is that it enables a linear large-signal transconductance cell. The other property that can be exploited is that it gives an output current proportional to the square of a differential input signal.
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Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044), 2002
The VLSI industry is accelerating towards the end of scaling (bulk) CMOS. Near its scaling limit, a CMOS transistor could have a channel length of about 25 nm, a switching speed about three times as fast as a device of 100-nm channel length, and an f/sub T/ of about 250 GHz.
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The VLSI industry is accelerating towards the end of scaling (bulk) CMOS. Near its scaling limit, a CMOS transistor could have a channel length of about 25 nm, a switching speed about three times as fast as a device of 100-nm channel length, and an f/sub T/ of about 250 GHz.
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Proceedings 20th IEEE VLSI Test Symposium (VTS 2002), 2005
B. Courtoi, Michael R. B. Forshaw
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B. Courtoi, Michael R. B. Forshaw
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International Journal of Circuit Theory and Applications, 1995
PALMISANO, Giuseppe, PALUMBO, Gaetano
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PALMISANO, Giuseppe, PALUMBO, Gaetano
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