Results 291 to 300 of about 389,945 (331)

Dynamic mapping of network-level LTP in the hippocampus via high-resolution bioelectrical sensing. [PDF]

open access: yesAPL Bioeng
Khanzada S   +6 more
europepmc   +1 more source

Graphene for CMOS and Beyond CMOS Applications

Proceedings of the IEEE, 2010
Owing in part to complementary metal-oxide-semiconductor (CMOS) scaling issues, the semiconductor industry is placing an increased emphasis on emerging materials and devices that may provide a solution beyond the 22-nm node. Single and few layers of carbon sheets (graphene) have been fabricated by a variety of techniques including mechanical ...
Leonard F. Register   +6 more
openaire   +3 more sources

Mitigating defective CMOS to Non-CMOS vias in CMOS/Molecular memories

10th IEEE International Conference on Nanotechnology, 2010
CMOS/Molecular (CMOL) memory is one of the emerging memory technologies that promises increased data storage, reduced power consumption and minimized fabrication complexity. The fabrication of these memories is based on the stacking of non-CMOS-based memory cell array on the top of CMOS-based peripheral circuits.
Nor Zaidi Haron, Said Hamdioui
openaire   +2 more sources

CMOS clamped-swing logic (CMOS CSL) and CMOS differential clamped-swing logic (CMOS DCSL)

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems, 2003
Two new static CMOS logic circuits called the CMOS clamped-swing logic and the CMOS differential clamped-swing logic are proposed and analyzed. In these two new logic circuits, the internal circuit used to realize the logic functions has a small voltage swing, whereas the output signal has a normal swing compatible with other CMOS logic. Both new logic
Han-Hsiang Huang, Chung-Yu Wu
openaire   +2 more sources

Alternative CMOS or alternative to CMOS?

Microelectronics Reliability, 2001
Abstract We point out the main issues to address in order to investigate and push the limits of CMOS technology. The demand for low voltage, low power and high performance are the great challenges for engineering of sub-0.10 μm gate length devices. The possible solutions are reviewed through the issues in gate/channel and substrate, source and drain ...
openaire   +2 more sources

RF CMOS RELIABILITY

International Journal of High Speed Electronics and Systems, 2001
In this chapter the effects of hot carrier on the reliability of NMOS transistors are investigated. First, it is explained why the hot carrier issue can be important in RF CMOS circuits. Important mechanisms of hot carrier generation are reviewed and some of the techniques used in the measurement of hot carrier damages are explained.
Sasan Naseh, M. Jamal Deen
openaire   +2 more sources

CMOS is dead … long live CMOS!

2007 IEEE Hot Chips 19 Symposium (HCS), 2007
This article consists of a collection of slides from the author's conference presentation on the future of CMOS technologies. Some of the specific topics discussed include: the market for CMOS scaling; design considerations for materials plus CMOS scaling; the future that considers devices plus materials plus CMOS scaling; and new areas of future chip ...
openaire   +2 more sources

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